pkg/highway: upgrade to fix compilation issues on LLVM18

pkg/highway/build.zig

@@ -76,6 +76,7 @@ pub fn build(b: *std.Build) !void {
         .root = upstream.path(""),
         .flags = flags.items,
         .files = &.{
+            "hwy/abort.cc",
             "hwy/aligned_allocator.cc",
             "hwy/nanobenchmark.cc",
             "hwy/per_target.cc",

pkg/highway/build.zig.zon

@@ -1,13 +1,13 @@
 .{
     .name = .highway,
-    .version = "1.1.0",
+    .version = "1.2.0",
     .fingerprint = 0xdbcf1a7425023274,
     .paths = .{""},
     .dependencies = .{
         // google/highway
         .highway = .{
-            .url = "https://deps.files.ghostty.org/highway-12205c83b8311a24b1d5ae6d21640df04f4b0726e314337c043cde1432758cbe165b.tar.gz",
-            .hash = "N-V-__8AAGCXYgBcg7gxGiSx1a5tIWQN8E9LBybjFDN8BDze",
+            .url = "https://deps.files.ghostty.org/highway-66486a10623fa0d72fe91260f96c892e41aceb06.tar.gz",
+            .hash = "N-V-__8AAGmZhABbsPJLfbqrh6JTHsXhY6qCaLAQyx25e0XE",
         },
 
         .apple_sdk = .{ .path = "../apple-sdk" },

pkg/simdutf/build.zig

@@ -1,8 +1,28 @@
 const std = @import("std");
 
 pub fn build(b: *std.Build) !void {
-    const target = b.standardTargetOptions(.{});
     const optimize = b.standardOptimizeOption(.{});
+    const target = target: {
+        var query = b.standardTargetOptionsQueryOnly(.{});
+
+        // This works around a Zig 0.14 bug where targeting an iOS
+        // simulator sets our CPU model to be "apple_a7" which is
+        // too outdated to support SIMD features and is also wrong.
+        // Simulator binaries run on the host CPU so target native.
+        //
+        // We can remove this when the following builds without
+        // issue without this line:
+        //
+        //   zig build -Dtarget=aarch64-ios.17.0-simulator
+        //
+        if (query.abi) |abi| {
+            if (abi == .simulator) {
+                query.cpu_model = .native;
+            }
+        }
+
+        break :target b.resolveTargetQuery(query);
+    };
 
     const lib = b.addStaticLibrary(.{
         .name = "simdutf",

src/build/GhosttyXCFramework.zig

@@ -29,6 +29,7 @@ pub fn init(b: *std.Build, deps: *const SharedDeps) !GhosttyXCFramework {
         b,
         b.resolveTargetQuery(.{
             .cpu_arch = .aarch64,
+            .cpu_model = .native,
             .os_tag = .ios,
             .os_version_min = Config.osVersionMin(.ios),
             .abi = .simulator,

src/simd/index_of.h

@@ -70,7 +70,7 @@ size_t IndexOfImpl(D d, T needle, const T* HWY_RESTRICT input, size_t count) {
     using D1 = decltype(d1);
 
     // Get an equally sized needle vector with only one lane.
-    const hn::Vec<D1> needle1 = Set(d1, GetLane(needle_vec));
+    const hn::Vec<D1> needle1 = Set(d1, hn::GetLane(needle_vec));
 
     // Go through the remaining elements and do similar logic to
     // the previous loop to find any matches.

src/simd/vt.cpp

@@ -103,7 +103,7 @@ size_t DecodeUTF8UntilControlSeqImpl(D d,
   if (i != count) {
     const hn::CappedTag<T, 1> d1;
     using D1 = decltype(d1);
-    const hn::Vec<D1> esc1 = Set(d1, GetLane(esc_vec));
+    const hn::Vec<D1> esc1 = Set(d1, hn::GetLane(esc_vec));
     for (; i < count; ++i) {
       const hn::Vec<D1> input_vec = hn::LoadU(d1, input + i);
       const auto esc_idx = IndexOfChunk(d1, esc1, input_vec);