// Copyright 2021 The Go Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

TEXT errors(SB),$0
	MOV	$errors(SB), (X5)		// ERROR "address load must target register"
	MOV	$8(SP), (X5)			// ERROR "address load must target register"
	MOVB	$8(SP), X5			// ERROR "unsupported address load"
	MOVH	$8(SP), X5			// ERROR "unsupported address load"
	MOVW	$8(SP), X5			// ERROR "unsupported address load"
	MOVF	$8(SP), X5			// ERROR "unsupported address load"
	MOV	$1234, 0(SP)			// ERROR "constant load must target register"
	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
	MOV	$0, 0(SP)			// ERROR "constant load must target register"
	MOV	$0, 8(SP)			// ERROR "constant load must target register"
	MOV	$1234, 0(SP)			// ERROR "constant load must target register"
	MOV	$1234, 8(SP)			// ERROR "constant load must target register"
	MOVB	$1, X5				// ERROR "unsupported constant load"
	MOVH	$1, X5				// ERROR "unsupported constant load"
	MOVW	$1, X5				// ERROR "unsupported constant load"
	MOVF	$1, X5				// ERROR "unsupported constant load"
	MOVBU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVHU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVWU	X5, (X6)			// ERROR "unsupported unsigned store"
	MOVF	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOVD	F0, F1, F2			// ERROR "illegal MOV instruction"
	MOV	X10, X11, X12			// ERROR "illegal MOV instruction"
	MOVW	X10, X11, X12			// ERROR "illegal MOV instruction"
	RORI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	SLLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	SRLI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	SRAI	$64, X5, X6			// ERROR "immediate out of range 0 to 63"
	BEQ	X5, X6, $1			// ERROR "instruction with branch-like opcode lacks destination"
	BEQ	X5, X6, 31(X10)			// ERROR "instruction with branch-like opcode lacks destination"
	RORI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
	SLLI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
	SRLI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
	SRAI	$-1, X5, X6			// ERROR "immediate out of range 0 to 63"
	RORIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	SLLIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRLIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRAIW	$32, X5, X6			// ERROR "immediate out of range 0 to 31"
	RORIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"
	SLLIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRLIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"
	SRAIW	$-1, X5, X6			// ERROR "immediate out of range 0 to 31"
	SD	X5, 4294967296(X6)		// ERROR "constant 4294967296 too large"
	FNES	F1, (X5)			// ERROR "needs an integer register output"

	//
	// "V" Standard Extension for Vector Operations, Version 1.0
	//
	VSETIVLI X10, E32, M2, TA, MA, X12	// ERROR "expected immediate value"
	VLE8V	(X10), V1, V3			// ERROR "invalid vector mask register"
	VSE8V	V3, V1, (X10)			// ERROR "invalid vector mask register"
	VLSE8V	(X10), X10, V1, V3		// ERROR "invalid vector mask register"
	VSSE8V	V3, X11, V1, (X10)		// ERROR "invalid vector mask register"
	VLUXEI8V (X10), V2, V1, V3		// ERROR "invalid vector mask register"
	VSUXEI8V V3, V2, V1, (X10)		// ERROR "invalid vector mask register"
	VLOXEI8V (X10), V2, V1, V3		// ERROR "invalid vector mask register"
	VSOXEI8V V3, V2, V1, (X10)		// ERROR "invalid vector mask register"
	VL1RV	(X10), V0, V3			// ERROR "too many operands for instruction"
	VS1RV	V3, V0, (X11)			// ERROR "too many operands for instruction"
	VADDVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VADDVX	X10, V2, V1, V3			// ERROR "invalid vector mask register"
	VADDVI	$15, V4, V1, V2			// ERROR "invalid vector mask register"
	VSUBVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSUBVX	X10, V2, V1, V3			// ERROR "invalid vector mask register"
	VRSUBVX	X10, V2, V1, V3			// ERROR "invalid vector mask register"
	VRSUBVI	$15, V4, V1, V2			// ERROR "invalid vector mask register"
	VNEGV	V2, V3, V4			// ERROR "invalid vector mask register"
	VWADDUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWADDUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWSUBUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWSUBUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWADDVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWADDVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VWSUBVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWSUBVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VWADDUWV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWADDUWX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWSUBUWV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWSUBUWX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWADDWV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWADDWX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VWSUBWV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWSUBWX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VWCVTXXV V2, V1, V3			// ERROR "invalid vector mask register"
	VWCVTUXXV V2, V1, V3			// ERROR "invalid vector mask register"
	VZEXTVF2 V2, V3, V4			// ERROR "invalid vector mask register"
	VSEXTVF2 V2, V3, V4			// ERROR "invalid vector mask register"
	VZEXTVF4 V2, V3, V4			// ERROR "invalid vector mask register"
	VSEXTVF4 V2, V3, V4			// ERROR "invalid vector mask register"
	VZEXTVF8 V2, V3, V4			// ERROR "invalid vector mask register"
	VSEXTVF8 V2, V3, V4			// ERROR "invalid vector mask register"
	VADCVVM	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VADCVVM	V1, V2, V3			// ERROR "invalid vector mask register"
	VADCVXM	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VADCVXM	X10, V2, V3			// ERROR "invalid vector mask register"
	VADCVIM	$15, V2, V1, V3			// ERROR "invalid vector mask register"
	VADCVIM	$15, V2, V3			// ERROR "invalid vector mask register"
	VMADCVVM V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMADCVVM V1, V2, V3			// ERROR "invalid vector mask register"
	VMADCVXM X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMADCVXM X10, V2, V3			// ERROR "invalid vector mask register"
	VMADCVIM $15, V2, V1, V3		// ERROR "invalid vector mask register"
	VMADCVIM $15, V2, V3			// ERROR "invalid vector mask register"
	VSBCVVM	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSBCVVM	V1, V2, V3			// ERROR "invalid vector mask register"
	VSBCVXM	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSBCVXM	X10, V2, V3			// ERROR "invalid vector mask register"
	VMSBCVVM V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSBCVVM V1, V2, V3			// ERROR "invalid vector mask register"
	VMSBCVXM X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSBCVXM X10, V2, V3			// ERROR "invalid vector mask register"
	VANDVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VANDVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VANDVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VORVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VORVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VORVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VXORVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VXORVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VXORVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VNOTV	V1, V2, V3			// ERROR "invalid vector mask register"
	VSLLVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSLLVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSLLVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VSRLVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSRLVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSRLVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VSRAVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSRAVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSRAVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VNSRLWV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VNSRLWX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VNSRLWI	$31, V2, V4, V3			// ERROR "invalid vector mask register"
	VNSRAWV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VNSRAWX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VNSRAWI	$31, V2, V4, V3			// ERROR "invalid vector mask register"
	VNCVTXXW V2, V4, V3			// ERROR "invalid vector mask register"
	VMSEQVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSEQVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSEQVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSNEVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSNEVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSNEVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLTUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLTUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSLTVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLTVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLEUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLEUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSLEUVI $15, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSLEVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLEVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLEVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGTUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGTUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSGTUVI $15, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSGTVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGTVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGTVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGEVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGEUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLTVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSLTUVI $15, V2, V4, V3		// ERROR "invalid vector mask register"
	VMSGEVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VMSGEUVI $15, V2, V4, V3		// ERROR "invalid vector mask register"
	VMINUVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMINUVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMINVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMINVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMAXUVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMAXUVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMAXVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMAXVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMULVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMULVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMULHVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMULHVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VMULHUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMULHUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMULHSUVV V1, V2, V4, V3		// ERROR "invalid vector mask register"
	VMULHSUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VDIVUVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VDIVUVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VDIVVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VDIVVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VREMUVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VREMUVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VREMVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VREMVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VWMULVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWMULVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VWMULUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWMULUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMULSUVV V1, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMULSUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMACCVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMACCVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VNMSACVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VNMSACVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMADDVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VMADDVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VNMSUBVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VNMSUBVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMACCUVV V1, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMACCUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMACCVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VWMACCVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMACCSUVV V1, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMACCSUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VWMACCUSVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMERGEVVM V1, V2, V3			// ERROR "invalid vector mask register"
	VMERGEVVM V1, V2, V4, V3		// ERROR "invalid vector mask register"
	VMERGEVXM X10, V2, V3			// ERROR "invalid vector mask register"
	VMERGEVXM X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VMERGEVIM $15, V2, V3			// ERROR "invalid vector mask register"
	VMERGEVIM $15, V2, V4, V3		// ERROR "invalid vector mask register"
	VMVVV	V1, V2, V3			// ERROR "too many operands for instruction"
	VMVVX	X10, V2, V3			// ERROR "too many operands for instruction"
	VMVVI	$15, V2, V3			// ERROR "too many operands for instruction"
	VSADDUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSADDUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VSADDUVI $15, V2, V4, V3		// ERROR "invalid vector mask register"
	VSADDVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSADDVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSADDVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSUBUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSUBUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VSSUBVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSUBVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VAADDUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VAADDUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VAADDVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VAADDVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VASUBUVV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VASUBUVX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VASUBVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VASUBVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSMULVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSMULVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSRLVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSRLVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSRLVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSRAVV	V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSRAVX	X10, V2, V4, V3			// ERROR "invalid vector mask register"
	VSSRAVI	$15, V2, V4, V3			// ERROR "invalid vector mask register"
	VNCLIPUWV V1, V2, V4, V3		// ERROR "invalid vector mask register"
	VNCLIPUWX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VNCLIPUWI $16, V2, V4, V3		// ERROR "invalid vector mask register"
	VNCLIPWV V1, V2, V4, V3			// ERROR "invalid vector mask register"
	VNCLIPWX X10, V2, V4, V3		// ERROR "invalid vector mask register"
	VNCLIPWI $16, V2, V4, V3		// ERROR "invalid vector mask register"

	RET
