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cmd/internal/obj/riscv: improve instruction validation

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Ensure that rs2 is none for various instruction encodings. Fix a couple of cases
where it should have been but is not.

Change-Id: I9f8211a0257e49643dbbc89e158e048050ebe6f0
Reviewed-on: https://go-review.googlesource.com/c/go/+/349649
Trust: Joel Sing <joel@sing.id.au>
Reviewed-by: Cherry Mui <cherryyz@google.com>
Run-TryBot: Cherry Mui <cherryyz@google.com>
TryBot-Result: Go Bot <gobot@golang.org>
This commit is contained in:
Joel Sing 2021-09-14 02:21:22 +10:00
parent 14e812bfc5
commit 6602c86a38
1 changed files with 6 additions and 2 deletions
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8
src/cmd/internal/obj/riscv/obj.go
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@ -1003,6 +1003,7 @@ func validateII(ctxt *obj.Link, ins *instruction) {
wantImmI(ctxt, ins.as, ins.imm, 12) wantImmI(ctxt, ins.as, ins.imm, 12)
wantIntReg(ctxt, ins.as, "rd", ins.rd) wantIntReg(ctxt, ins.as, "rd", ins.rd)
wantIntReg(ctxt, ins.as, "rs1", ins.rs1) wantIntReg(ctxt, ins.as, "rs1", ins.rs1)
wantNoneReg(ctxt, ins.as, "rs2", ins.rs2)
wantNoneReg(ctxt, ins.as, "rs3", ins.rs3) wantNoneReg(ctxt, ins.as, "rs3", ins.rs3)
} }
@ -1010,6 +1011,7 @@ func validateIF(ctxt *obj.Link, ins *instruction) {
wantImmI(ctxt, ins.as, ins.imm, 12) wantImmI(ctxt, ins.as, ins.imm, 12)
wantFloatReg(ctxt, ins.as, "rd", ins.rd) wantFloatReg(ctxt, ins.as, "rd", ins.rd)
wantIntReg(ctxt, ins.as, "rs1", ins.rs1) wantIntReg(ctxt, ins.as, "rs1", ins.rs1)
wantNoneReg(ctxt, ins.as, "rs2", ins.rs2)
wantNoneReg(ctxt, ins.as, "rs3", ins.rs3) wantNoneReg(ctxt, ins.as, "rs3", ins.rs3)
} }
@ -1017,6 +1019,7 @@ func validateSI(ctxt *obj.Link, ins *instruction) {
wantImmI(ctxt, ins.as, ins.imm, 12) wantImmI(ctxt, ins.as, ins.imm, 12)
wantIntReg(ctxt, ins.as, "rd", ins.rd) wantIntReg(ctxt, ins.as, "rd", ins.rd)
wantIntReg(ctxt, ins.as, "rs1", ins.rs1) wantIntReg(ctxt, ins.as, "rs1", ins.rs1)
wantNoneReg(ctxt, ins.as, "rs2", ins.rs2)
wantNoneReg(ctxt, ins.as, "rs3", ins.rs3) wantNoneReg(ctxt, ins.as, "rs3", ins.rs3)
} }
@ -1024,6 +1027,7 @@ func validateSF(ctxt *obj.Link, ins *instruction) {
wantImmI(ctxt, ins.as, ins.imm, 12) wantImmI(ctxt, ins.as, ins.imm, 12)
wantIntReg(ctxt, ins.as, "rd", ins.rd) wantIntReg(ctxt, ins.as, "rd", ins.rd)
wantFloatReg(ctxt, ins.as, "rs1", ins.rs1) wantFloatReg(ctxt, ins.as, "rs1", ins.rs1)
wantNoneReg(ctxt, ins.as, "rs2", ins.rs2)
wantNoneReg(ctxt, ins.as, "rs3", ins.rs3) wantNoneReg(ctxt, ins.as, "rs3", ins.rs3)
} }
@ -1567,7 +1571,7 @@ func instructionForProg(p *obj.Prog) *instruction {
func instructionsForOpImmediate(p *obj.Prog, as obj.As, rs int16) []*instruction { func instructionsForOpImmediate(p *obj.Prog, as obj.As, rs int16) []*instruction {
// <opi> $imm, REG, TO // <opi> $imm, REG, TO
ins := instructionForProg(p) ins := instructionForProg(p)
ins.as, ins.rs1 = as, uint32(rs) ins.as, ins.rs1, ins.rs2 = as, uint32(rs), obj.REG_NONE
low, high, err := Split32BitImmediate(ins.imm) low, high, err := Split32BitImmediate(ins.imm)
if err != nil { if err != nil {
@ -1990,7 +1994,7 @@ func instructionsForProg(p *obj.Prog) []*instruction {
case ASEQZ: case ASEQZ:
// SEQZ rs, rd -> SLTIU $1, rs, rd // SEQZ rs, rd -> SLTIU $1, rs, rd
ins.as = ASLTIU ins.as = ASLTIU
ins.rs1 = uint32(p.From.Reg) ins.rs1, ins.rs2 = uint32(p.From.Reg), obj.REG_NONE
ins.imm = 1 ins.imm = 1
case ASNEZ: case ASNEZ: