From a8fc82f77abff99a3f55b015b017cb4342cd9c08 Mon Sep 17 00:00:00 2001 From: "Ruixin(Peter) Bao" Date: Sat, 26 Oct 2019 18:44:34 -0400 Subject: [PATCH] cmd/asm/internal/asm/testdata/s390x: add test cases for some assembly instructions From CL 199979, I noticed that there were some instructions not covered by the test cases. Added those in this CL. Additional tests for assembly instructions are also added based on suggestions made during the review of this CL. Previously, VSB and VSH are not included in asmz.go, they were also added in this patch. Change-Id: I6060a9813b483a161d61ad2240c30eec6de61536 Reviewed-on: https://go-review.googlesource.com/c/go/+/203721 Reviewed-by: Michael Munday --- src/cmd/asm/internal/asm/testdata/s390x.s | 60 ++++++++++++++++++++++- src/cmd/internal/obj/s390x/asmz.go | 2 + 2 files changed, 61 insertions(+), 1 deletion(-) diff --git a/src/cmd/asm/internal/asm/testdata/s390x.s b/src/cmd/asm/internal/asm/testdata/s390x.s index bc0a49c8cc..ad5241f926 100644 --- a/src/cmd/asm/internal/asm/testdata/s390x.s +++ b/src/cmd/asm/internal/asm/testdata/s390x.s @@ -201,6 +201,24 @@ TEXT main·foo(SB),DUPOK|NOSPLIT,$16-0 // TEXT main.foo(SB), DUPOK|NOSPLIT, $16- XORW (R1), R2 // 57201000 XORW -1(R1), R2 // e3201fffff57 + // shift and rotate instructions + SRD $4, R4, R7 // eb740004000c + SRD R1, R4, R7 // eb741000000c + SRW $4, R4, R7 // eb74000400de + SRW R1, R4, R7 // eb74100000de + SLW $4, R3, R6 // eb63000400df + SLW R2, R3, R6 // eb63200000df + SLD $4, R3, R6 // eb630004000d + SLD R2, R3, R6 // eb632000000d + SRAD $4, R5, R8 // eb850004000a + SRAD R3, R5, R8 // eb853000000a + SRAW $4, R5, R8 // eb85000400dc + SRAW R3, R5, R8 // eb85300000dc + RLL R1, R2, R3 // eb321000001d + RLL $4, R2, R3 // eb320004001d + RLLG R1, R2, R3 // eb321000001c + RLLG $4, R2, R3 // eb320004001c + RNSBG $0, $31, $32, R1, R2 // ec21001f2054 RXSBG $17, $8, $16, R3, R4 // ec4311081057 ROSBG $9, $24, $11, R5, R6 // ec6509180b56 @@ -227,6 +245,16 @@ TEXT main·foo(SB),DUPOK|NOSPLIT,$16-0 // TEXT main.foo(SB), DUPOK|NOSPLIT, $16- LAO R1, R2, (R3) // eb21300000f6 LAOG R4, R5, (R6) // eb54600000e6 + // load and store multiple + LMG n-8(SP), R3, R4 // eb34f0100004 + LMG -5(R5), R3, R4 // eb345ffbff04 + LMY n-8(SP), R3, R4 // 9834f010 + LMY 4096(R1), R3, R4 // eb3410000198 + STMG R1, R2, n-8(SP) // eb12f0100024 + STMG R1, R2, -5(R3) // eb123ffbff24 + STMY R1, R2, n-8(SP) // 9012f010 + STMY R1, R2, 4096(R3) // eb1230000190 + XC $8, (R15), n-8(SP) // d707f010f000 NC $8, (R15), n-8(SP) // d407f010f000 OC $8, (R15), n-8(SP) // d607f010f000 @@ -376,6 +404,29 @@ TEXT main·foo(SB),DUPOK|NOSPLIT,$16-0 // TEXT main.foo(SB), DUPOK|NOSPLIT, $16- UNDEF // 00000000 NOPH // 0700 + // vector add and sub instructions + VAB V3, V4, V4 // e743400000f3 + VAH V3, V4, V4 // e743400010f3 + VAF V3, V4, V4 // e743400020f3 + VAG V3, V4, V4 // e743400030f3 + VAQ V3, V4, V4 // e743400040f3 + VAB V1, V2 // e721200000f3 + VAH V1, V2 // e721200010f3 + VAF V1, V2 // e721200020f3 + VAG V1, V2 // e721200030f3 + VAQ V1, V2 // e721200040f3 + VSB V3, V4, V4 // e744300000f7 + VSH V3, V4, V4 // e744300010f7 + VSF V3, V4, V4 // e744300020f7 + VSG V3, V4, V4 // e744300030f7 + VSQ V3, V4, V4 // e744300040f7 + VSB V1, V2 // e722100000f7 + VSH V1, V2 // e722100010f7 + VSF V1, V2 // e722100020f7 + VSG V1, V2 // e722100030f7 + VSQ V1, V2 // e722100040f7 + + VCEQB V1, V3, V3 // e731300000f8 VL (R15), V1 // e710f0000006 VST V1, (R15) // e710f000000e VL (R15), V31 // e7f0f0000806 @@ -399,9 +450,16 @@ TEXT main·foo(SB),DUPOK|NOSPLIT,$16-0 // TEXT main.foo(SB), DUPOK|NOSPLIT, $16- VFEEZBS V1, V2, V31 // e7f120300880 WFCHDBS V22, V23, V4 // e746701836eb VMNH V1, V2, V30 // e7e1200018fe - VO V2, V1, V0 // e7021000006a VERLLVF V2, V30, V27 // e7be20002c73 VSCBIB V0, V23, V24 // e78700000cf5 + VN V2, V1, V0 // e70210000068 + VNC V2, V1, V0 // e70210000069 + VO V2, V1, V0 // e7021000006a + VX V2, V1, V0 // e7021000006d + VN V16, V1 // e71010000468 + VNC V16, V1 // e71010000469 + VO V16, V1 // e7101000046a + VX V16, V1 // e7101000046d VNOT V16, V1 // e7101000046b VCLZF V16, V17 // e71000002c53 VLVGP R3, R4, V8 // e78340000062 diff --git a/src/cmd/internal/obj/s390x/asmz.go b/src/cmd/internal/obj/s390x/asmz.go index 3cc7d0b160..48353a4121 100644 --- a/src/cmd/internal/obj/s390x/asmz.go +++ b/src/cmd/internal/obj/s390x/asmz.go @@ -1384,6 +1384,8 @@ func buildop(ctxt *obj.Link) { opset(AVSRAB, r) opset(AVSRL, r) opset(AVSRLB, r) + opset(AVSB, r) + opset(AVSH, r) opset(AVSF, r) opset(AVSG, r) opset(AVSQ, r)