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big: assembly routines for 386 long shifts
R=rsc CC=golang-dev https://golang.org/cl/974043
This commit is contained in:
Robert Griesemer
parent
2b0a30c4b5
commit
f78b09e673
@ -11,8 +11,8 @@ TEXT ·addVV(SB),7,$0
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MOVL x+4(FP), SI
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MOVL y+8(FP), CX
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MOVL n+12(FP), BP
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MOVL $0, BX // i = 0
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MOVL $0, DX // c = 0
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MOVL $0, BX // i = 0
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MOVL $0, DX // c = 0
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JMP E1
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L1: MOVL (SI)(BX*4), AX
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@ -20,7 +20,7 @@ L1: MOVL (SI)(BX*4), AX
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ADCL (CX)(BX*4), AX
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RCLL $1, DX
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MOVL AX, (DI)(BX*4)
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ADDL $1, BX // i++
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ADDL $1, BX // i++
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E1: CMPL BX, BP // i < n
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JL L1
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@ -36,8 +36,8 @@ TEXT ·subVV(SB),7,$0
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MOVL x+4(FP), SI
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MOVL y+8(FP), CX
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MOVL n+12(FP), BP
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MOVL $0, BX // i = 0
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MOVL $0, DX // c = 0
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MOVL $0, BX // i = 0
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MOVL $0, DX // c = 0
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JMP E2
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L2: MOVL (SI)(BX*4), AX
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@ -45,9 +45,9 @@ L2: MOVL (SI)(BX*4), AX
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SBBL (CX)(BX*4), AX
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RCLL $1, DX
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MOVL AX, (DI)(BX*4)
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ADDL $1, BX // i++
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ADDL $1, BX // i++
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E2: CMPL BX, BP // i < n
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E2: CMPL BX, BP // i < n
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JL L2
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MOVL DX, c+16(FP)
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@ -58,18 +58,18 @@ E2: CMPL BX, BP // i < n
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TEXT ·addVW(SB),7,$0
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MOVL z+0(FP), DI
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MOVL x+4(FP), SI
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MOVL y+8(FP), AX // c = y
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MOVL y+8(FP), AX // c = y
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MOVL n+12(FP), BP
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MOVL $0, BX // i = 0
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MOVL $0, BX // i = 0
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JMP E3
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L3: ADDL (SI)(BX*4), AX
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MOVL AX, (DI)(BX*4)
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RCLL $1, AX
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ANDL $1, AX
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ADDL $1, BX // i++
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ADDL $1, BX // i++
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E3: CMPL BX, BP // i < n
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E3: CMPL BX, BP // i < n
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JL L3
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MOVL AX, c+16(FP)
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@ -80,9 +80,9 @@ E3: CMPL BX, BP // i < n
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TEXT ·subVW(SB),7,$0
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MOVL z+0(FP), DI
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MOVL x+4(FP), SI
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MOVL y+8(FP), AX // c = y
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MOVL y+8(FP), AX // c = y
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MOVL n+12(FP), BP
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MOVL $0, BX // i = 0
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MOVL $0, BX // i = 0
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JMP E4
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L4: MOVL (SI)(BX*4), DX // TODO(gri) is there a reverse SUBL?
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@ -90,9 +90,9 @@ L4: MOVL (SI)(BX*4), DX // TODO(gri) is there a reverse SUBL?
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MOVL DX, (DI)(BX*4)
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RCLL $1, AX
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ANDL $1, AX
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ADDL $1, BX // i++
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ADDL $1, BX // i++
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E4: CMPL BX, BP // i < n
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E4: CMPL BX, BP // i < n
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JL L4
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MOVL AX, c+16(FP)
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@ -100,17 +100,52 @@ E4: CMPL BX, BP // i < n
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// func shlVW(z, x *Word, s Word, n int) (c Word)
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// TODO(gri) implement this routine
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TEXT ·shlVW(SB),7,$0
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NOP // work around bug in linker
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JMP ·shlVW_g(SB)
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MOVL z+0(FP), DI
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MOVL x+4(FP), SI
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MOVL s+8(FP), CX
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MOVL n+12(FP), BP
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MOVL $0, AX // c = 0
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MOVL $0, BX // i = 0
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JMP E8
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L8: MOVL (SI)(BX*8), DX
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SHLL CX, DX:AX
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MOVL DX, (DI)(BX*8)
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MOVL (SI)(BX*8), AX // reload (not enough regs to save original DX)
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ADDL $1, BX // i++
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E8: CMPL BX, BP // i < n
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JL L8
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MOVL $0, DX
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SHLL CX, DX:AX
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MOVL DX, c+16(FP)
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RET
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// func shrVW(z, x *Word, s Word, n int) (c Word)
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// TODO(gri) implement this routine
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TEXT ·shrVW(SB),7,$0
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NOP // work around bug in linker
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JMP ·shrVW_g(SB)
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MOVL z+0(FP), DI
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MOVL x+4(FP), SI
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MOVL s+8(FP), CX
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MOVL n+12(FP), BX // i = n
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MOVL $0, AX // c = 0
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JMP E9
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L9: MOVL (SI)(BX*8), DX
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MOVL DX, BP
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SHRL CX, DX:AX
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MOVL DX, (DI)(BX*8)
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MOVL BP, AX
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E9: SUBL $1, BX // i--
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JGE L9
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MOVL $0, DX
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SHRL CX, DX:AX
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MOVL DX, c+16(FP)
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RET
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// func mulAddVWW(z, x *Word, y, r Word, n int) (c Word)
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@ -118,7 +153,7 @@ TEXT ·mulAddVWW(SB),7,$0
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MOVL z+0(FP), DI
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MOVL x+4(FP), SI
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MOVL y+8(FP), BP
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MOVL r+12(FP), CX // c = r
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MOVL r+12(FP), CX // c = r
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MOVL n+16(FP), BX
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LEAL (SI)(BX*4), SI
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LEAL (DI)(BX*4), DI
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@ -131,9 +166,9 @@ L5: MOVL (SI)(BX*4), AX
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ADCL $0, DX
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MOVL AX, (DI)(BX*4)
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MOVL DX, CX
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ADDL $1, BX // i++
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ADDL $1, BX // i++
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E5: CMPL BX, $0 // i < 0
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E5: CMPL BX, $0 // i < 0
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JL L5
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MOVL CX, c+20(FP)
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@ -148,8 +183,8 @@ TEXT ·addMulVVW(SB),7,$0
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MOVL n+12(FP), BX
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LEAL (SI)(BX*4), SI
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LEAL (DI)(BX*4), DI
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NEGL BX // i = -n
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MOVL $0, CX // c = 0
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NEGL BX // i = -n
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MOVL $0, CX // c = 0
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JMP E6
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L6: MOVL (SI)(BX*4), AX
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@ -160,9 +195,9 @@ L6: MOVL (SI)(BX*4), AX
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ADCL $0, DX
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MOVL AX, (DI)(BX*4)
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MOVL DX, CX
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ADDL $1, BX // i++
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ADDL $1, BX // i++
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E6: CMPL BX, $0 // i < 0
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E6: CMPL BX, $0 // i < 0
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JL L6
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MOVL CX, c+16(FP)
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@ -172,18 +207,18 @@ E6: CMPL BX, $0 // i < 0
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// divWVW(z* Word, xn Word, x *Word, y Word, n int) (r Word)
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TEXT ·divWVW(SB),7,$0
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MOVL z+0(FP), DI
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MOVL xn+4(FP), DX // r = xn
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MOVL xn+4(FP), DX // r = xn
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MOVL x+8(FP), SI
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MOVL y+12(FP), CX
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MOVL n+16(FP), BX // i = n
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MOVL n+16(FP), BX // i = n
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JMP E7
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L7: MOVL (SI)(BX*4), AX
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DIVL CX
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MOVL AX, (DI)(BX*4)
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E7: SUBL $1, BX // i--
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JGE L7 // i >= 0
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E7: SUBL $1, BX // i--
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JGE L7 // i >= 0
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MOVL DX, r+20(FP)
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RET
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