mirror of
https://github.com/golang/go.git
synced 2025-05-24 17:01:26 +00:00
f94e0745b3
Rename StoreConst to ValAndOff so we can use it for other ops. Make ValAndOff print nicely. Add some notes & checks related to my aborted attempt to implement combined CMP+load ops. Change-Id: I2f901d12d42bc5a82879af0334806aa184a97e27 Reviewed-on: https://go-review.googlesource.com/18947 Run-TryBot: David Chase <drchase@google.com> Reviewed-by: David Chase <drchase@google.com>
16853 lines
358 KiB
Go
16853 lines
358 KiB
Go
// autogenerated from gen/AMD64.rules: do not edit!
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// generated with: cd gen; go run *.go
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package ssa
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import "math"
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var _ = math.MinInt8 // in case not otherwise used
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func rewriteValueAMD64(v *Value, config *Config) bool {
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switch v.Op {
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case OpAMD64ADDB:
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return rewriteValueAMD64_OpAMD64ADDB(v, config)
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case OpAMD64ADDBconst:
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return rewriteValueAMD64_OpAMD64ADDBconst(v, config)
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case OpAMD64ADDL:
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return rewriteValueAMD64_OpAMD64ADDL(v, config)
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case OpAMD64ADDLconst:
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return rewriteValueAMD64_OpAMD64ADDLconst(v, config)
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case OpAMD64ADDQ:
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return rewriteValueAMD64_OpAMD64ADDQ(v, config)
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case OpAMD64ADDQconst:
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return rewriteValueAMD64_OpAMD64ADDQconst(v, config)
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case OpAMD64ADDW:
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return rewriteValueAMD64_OpAMD64ADDW(v, config)
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case OpAMD64ADDWconst:
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return rewriteValueAMD64_OpAMD64ADDWconst(v, config)
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case OpAMD64ANDB:
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return rewriteValueAMD64_OpAMD64ANDB(v, config)
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case OpAMD64ANDBconst:
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return rewriteValueAMD64_OpAMD64ANDBconst(v, config)
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case OpAMD64ANDL:
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return rewriteValueAMD64_OpAMD64ANDL(v, config)
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case OpAMD64ANDLconst:
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return rewriteValueAMD64_OpAMD64ANDLconst(v, config)
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case OpAMD64ANDQ:
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return rewriteValueAMD64_OpAMD64ANDQ(v, config)
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case OpAMD64ANDQconst:
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return rewriteValueAMD64_OpAMD64ANDQconst(v, config)
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case OpAMD64ANDW:
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return rewriteValueAMD64_OpAMD64ANDW(v, config)
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case OpAMD64ANDWconst:
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return rewriteValueAMD64_OpAMD64ANDWconst(v, config)
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case OpAdd16:
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return rewriteValueAMD64_OpAdd16(v, config)
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case OpAdd32:
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return rewriteValueAMD64_OpAdd32(v, config)
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case OpAdd32F:
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return rewriteValueAMD64_OpAdd32F(v, config)
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case OpAdd64:
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return rewriteValueAMD64_OpAdd64(v, config)
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case OpAdd64F:
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return rewriteValueAMD64_OpAdd64F(v, config)
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case OpAdd8:
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return rewriteValueAMD64_OpAdd8(v, config)
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case OpAddPtr:
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return rewriteValueAMD64_OpAddPtr(v, config)
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case OpAddr:
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return rewriteValueAMD64_OpAddr(v, config)
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case OpAnd16:
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return rewriteValueAMD64_OpAnd16(v, config)
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case OpAnd32:
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return rewriteValueAMD64_OpAnd32(v, config)
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case OpAnd64:
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return rewriteValueAMD64_OpAnd64(v, config)
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case OpAnd8:
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return rewriteValueAMD64_OpAnd8(v, config)
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case OpAMD64CMPB:
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return rewriteValueAMD64_OpAMD64CMPB(v, config)
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case OpAMD64CMPBconst:
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return rewriteValueAMD64_OpAMD64CMPBconst(v, config)
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case OpAMD64CMPL:
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return rewriteValueAMD64_OpAMD64CMPL(v, config)
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case OpAMD64CMPLconst:
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return rewriteValueAMD64_OpAMD64CMPLconst(v, config)
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case OpAMD64CMPQ:
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return rewriteValueAMD64_OpAMD64CMPQ(v, config)
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case OpAMD64CMPQconst:
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return rewriteValueAMD64_OpAMD64CMPQconst(v, config)
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case OpAMD64CMPW:
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return rewriteValueAMD64_OpAMD64CMPW(v, config)
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case OpAMD64CMPWconst:
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return rewriteValueAMD64_OpAMD64CMPWconst(v, config)
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case OpClosureCall:
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return rewriteValueAMD64_OpClosureCall(v, config)
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case OpCom16:
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return rewriteValueAMD64_OpCom16(v, config)
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case OpCom32:
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return rewriteValueAMD64_OpCom32(v, config)
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case OpCom64:
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return rewriteValueAMD64_OpCom64(v, config)
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case OpCom8:
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return rewriteValueAMD64_OpCom8(v, config)
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case OpConst16:
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return rewriteValueAMD64_OpConst16(v, config)
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case OpConst32:
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return rewriteValueAMD64_OpConst32(v, config)
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case OpConst32F:
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return rewriteValueAMD64_OpConst32F(v, config)
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case OpConst64:
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return rewriteValueAMD64_OpConst64(v, config)
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case OpConst64F:
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return rewriteValueAMD64_OpConst64F(v, config)
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case OpConst8:
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return rewriteValueAMD64_OpConst8(v, config)
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case OpConstBool:
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return rewriteValueAMD64_OpConstBool(v, config)
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case OpConstNil:
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return rewriteValueAMD64_OpConstNil(v, config)
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case OpConvert:
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return rewriteValueAMD64_OpConvert(v, config)
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case OpCvt32Fto32:
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return rewriteValueAMD64_OpCvt32Fto32(v, config)
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case OpCvt32Fto64:
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return rewriteValueAMD64_OpCvt32Fto64(v, config)
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case OpCvt32Fto64F:
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return rewriteValueAMD64_OpCvt32Fto64F(v, config)
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case OpCvt32to32F:
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return rewriteValueAMD64_OpCvt32to32F(v, config)
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case OpCvt32to64F:
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return rewriteValueAMD64_OpCvt32to64F(v, config)
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case OpCvt64Fto32:
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return rewriteValueAMD64_OpCvt64Fto32(v, config)
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case OpCvt64Fto32F:
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return rewriteValueAMD64_OpCvt64Fto32F(v, config)
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case OpCvt64Fto64:
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return rewriteValueAMD64_OpCvt64Fto64(v, config)
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case OpCvt64to32F:
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return rewriteValueAMD64_OpCvt64to32F(v, config)
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case OpCvt64to64F:
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return rewriteValueAMD64_OpCvt64to64F(v, config)
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case OpDeferCall:
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return rewriteValueAMD64_OpDeferCall(v, config)
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case OpDiv16:
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return rewriteValueAMD64_OpDiv16(v, config)
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case OpDiv16u:
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return rewriteValueAMD64_OpDiv16u(v, config)
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case OpDiv32:
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return rewriteValueAMD64_OpDiv32(v, config)
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case OpDiv32F:
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return rewriteValueAMD64_OpDiv32F(v, config)
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case OpDiv32u:
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return rewriteValueAMD64_OpDiv32u(v, config)
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case OpDiv64:
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return rewriteValueAMD64_OpDiv64(v, config)
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case OpDiv64F:
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return rewriteValueAMD64_OpDiv64F(v, config)
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case OpDiv64u:
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return rewriteValueAMD64_OpDiv64u(v, config)
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case OpDiv8:
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return rewriteValueAMD64_OpDiv8(v, config)
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case OpDiv8u:
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return rewriteValueAMD64_OpDiv8u(v, config)
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case OpEq16:
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return rewriteValueAMD64_OpEq16(v, config)
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case OpEq32:
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return rewriteValueAMD64_OpEq32(v, config)
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case OpEq32F:
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return rewriteValueAMD64_OpEq32F(v, config)
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case OpEq64:
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return rewriteValueAMD64_OpEq64(v, config)
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case OpEq64F:
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return rewriteValueAMD64_OpEq64F(v, config)
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case OpEq8:
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return rewriteValueAMD64_OpEq8(v, config)
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case OpEqPtr:
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return rewriteValueAMD64_OpEqPtr(v, config)
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case OpGeq16:
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return rewriteValueAMD64_OpGeq16(v, config)
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case OpGeq16U:
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return rewriteValueAMD64_OpGeq16U(v, config)
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case OpGeq32:
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return rewriteValueAMD64_OpGeq32(v, config)
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case OpGeq32F:
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return rewriteValueAMD64_OpGeq32F(v, config)
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case OpGeq32U:
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return rewriteValueAMD64_OpGeq32U(v, config)
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case OpGeq64:
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return rewriteValueAMD64_OpGeq64(v, config)
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case OpGeq64F:
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return rewriteValueAMD64_OpGeq64F(v, config)
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case OpGeq64U:
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return rewriteValueAMD64_OpGeq64U(v, config)
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case OpGeq8:
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return rewriteValueAMD64_OpGeq8(v, config)
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case OpGeq8U:
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return rewriteValueAMD64_OpGeq8U(v, config)
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case OpGetClosurePtr:
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return rewriteValueAMD64_OpGetClosurePtr(v, config)
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case OpGetG:
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return rewriteValueAMD64_OpGetG(v, config)
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case OpGoCall:
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return rewriteValueAMD64_OpGoCall(v, config)
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case OpGreater16:
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return rewriteValueAMD64_OpGreater16(v, config)
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case OpGreater16U:
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return rewriteValueAMD64_OpGreater16U(v, config)
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case OpGreater32:
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return rewriteValueAMD64_OpGreater32(v, config)
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case OpGreater32F:
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return rewriteValueAMD64_OpGreater32F(v, config)
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case OpGreater32U:
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return rewriteValueAMD64_OpGreater32U(v, config)
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case OpGreater64:
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return rewriteValueAMD64_OpGreater64(v, config)
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case OpGreater64F:
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return rewriteValueAMD64_OpGreater64F(v, config)
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case OpGreater64U:
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return rewriteValueAMD64_OpGreater64U(v, config)
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case OpGreater8:
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return rewriteValueAMD64_OpGreater8(v, config)
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case OpGreater8U:
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return rewriteValueAMD64_OpGreater8U(v, config)
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case OpHmul16:
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return rewriteValueAMD64_OpHmul16(v, config)
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case OpHmul16u:
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return rewriteValueAMD64_OpHmul16u(v, config)
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case OpHmul32:
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return rewriteValueAMD64_OpHmul32(v, config)
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case OpHmul32u:
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return rewriteValueAMD64_OpHmul32u(v, config)
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case OpHmul8:
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return rewriteValueAMD64_OpHmul8(v, config)
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case OpHmul8u:
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return rewriteValueAMD64_OpHmul8u(v, config)
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case OpITab:
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return rewriteValueAMD64_OpITab(v, config)
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case OpInterCall:
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return rewriteValueAMD64_OpInterCall(v, config)
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case OpIsInBounds:
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return rewriteValueAMD64_OpIsInBounds(v, config)
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case OpIsNonNil:
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return rewriteValueAMD64_OpIsNonNil(v, config)
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case OpIsSliceInBounds:
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return rewriteValueAMD64_OpIsSliceInBounds(v, config)
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case OpLeq16:
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return rewriteValueAMD64_OpLeq16(v, config)
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case OpLeq16U:
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return rewriteValueAMD64_OpLeq16U(v, config)
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case OpLeq32:
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return rewriteValueAMD64_OpLeq32(v, config)
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case OpLeq32F:
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return rewriteValueAMD64_OpLeq32F(v, config)
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case OpLeq32U:
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return rewriteValueAMD64_OpLeq32U(v, config)
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case OpLeq64:
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return rewriteValueAMD64_OpLeq64(v, config)
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case OpLeq64F:
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return rewriteValueAMD64_OpLeq64F(v, config)
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case OpLeq64U:
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return rewriteValueAMD64_OpLeq64U(v, config)
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case OpLeq8:
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return rewriteValueAMD64_OpLeq8(v, config)
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case OpLeq8U:
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return rewriteValueAMD64_OpLeq8U(v, config)
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case OpLess16:
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return rewriteValueAMD64_OpLess16(v, config)
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case OpLess16U:
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return rewriteValueAMD64_OpLess16U(v, config)
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case OpLess32:
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return rewriteValueAMD64_OpLess32(v, config)
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case OpLess32F:
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return rewriteValueAMD64_OpLess32F(v, config)
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case OpLess32U:
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return rewriteValueAMD64_OpLess32U(v, config)
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case OpLess64:
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return rewriteValueAMD64_OpLess64(v, config)
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case OpLess64F:
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return rewriteValueAMD64_OpLess64F(v, config)
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case OpLess64U:
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return rewriteValueAMD64_OpLess64U(v, config)
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case OpLess8:
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return rewriteValueAMD64_OpLess8(v, config)
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case OpLess8U:
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return rewriteValueAMD64_OpLess8U(v, config)
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case OpLoad:
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return rewriteValueAMD64_OpLoad(v, config)
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case OpLrot16:
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return rewriteValueAMD64_OpLrot16(v, config)
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case OpLrot32:
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return rewriteValueAMD64_OpLrot32(v, config)
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case OpLrot64:
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return rewriteValueAMD64_OpLrot64(v, config)
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case OpLrot8:
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return rewriteValueAMD64_OpLrot8(v, config)
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case OpLsh16x16:
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return rewriteValueAMD64_OpLsh16x16(v, config)
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case OpLsh16x32:
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return rewriteValueAMD64_OpLsh16x32(v, config)
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case OpLsh16x64:
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return rewriteValueAMD64_OpLsh16x64(v, config)
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case OpLsh16x8:
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return rewriteValueAMD64_OpLsh16x8(v, config)
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case OpLsh32x16:
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return rewriteValueAMD64_OpLsh32x16(v, config)
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case OpLsh32x32:
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return rewriteValueAMD64_OpLsh32x32(v, config)
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case OpLsh32x64:
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return rewriteValueAMD64_OpLsh32x64(v, config)
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case OpLsh32x8:
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return rewriteValueAMD64_OpLsh32x8(v, config)
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case OpLsh64x16:
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return rewriteValueAMD64_OpLsh64x16(v, config)
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case OpLsh64x32:
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return rewriteValueAMD64_OpLsh64x32(v, config)
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case OpLsh64x64:
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return rewriteValueAMD64_OpLsh64x64(v, config)
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case OpLsh64x8:
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return rewriteValueAMD64_OpLsh64x8(v, config)
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case OpLsh8x16:
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return rewriteValueAMD64_OpLsh8x16(v, config)
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case OpLsh8x32:
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return rewriteValueAMD64_OpLsh8x32(v, config)
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case OpLsh8x64:
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return rewriteValueAMD64_OpLsh8x64(v, config)
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case OpLsh8x8:
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return rewriteValueAMD64_OpLsh8x8(v, config)
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case OpAMD64MOVBQSX:
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return rewriteValueAMD64_OpAMD64MOVBQSX(v, config)
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case OpAMD64MOVBQZX:
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return rewriteValueAMD64_OpAMD64MOVBQZX(v, config)
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case OpAMD64MOVBload:
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return rewriteValueAMD64_OpAMD64MOVBload(v, config)
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case OpAMD64MOVBstore:
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return rewriteValueAMD64_OpAMD64MOVBstore(v, config)
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case OpAMD64MOVBstoreconst:
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return rewriteValueAMD64_OpAMD64MOVBstoreconst(v, config)
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case OpAMD64MOVLload:
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return rewriteValueAMD64_OpAMD64MOVLload(v, config)
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case OpAMD64MOVLstore:
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return rewriteValueAMD64_OpAMD64MOVLstore(v, config)
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case OpAMD64MOVLstoreconst:
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return rewriteValueAMD64_OpAMD64MOVLstoreconst(v, config)
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case OpAMD64MOVOload:
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return rewriteValueAMD64_OpAMD64MOVOload(v, config)
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case OpAMD64MOVOstore:
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return rewriteValueAMD64_OpAMD64MOVOstore(v, config)
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case OpAMD64MOVQload:
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return rewriteValueAMD64_OpAMD64MOVQload(v, config)
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case OpAMD64MOVQloadidx8:
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return rewriteValueAMD64_OpAMD64MOVQloadidx8(v, config)
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case OpAMD64MOVQstore:
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return rewriteValueAMD64_OpAMD64MOVQstore(v, config)
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case OpAMD64MOVQstoreconst:
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return rewriteValueAMD64_OpAMD64MOVQstoreconst(v, config)
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case OpAMD64MOVQstoreidx8:
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return rewriteValueAMD64_OpAMD64MOVQstoreidx8(v, config)
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case OpAMD64MOVSDload:
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return rewriteValueAMD64_OpAMD64MOVSDload(v, config)
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case OpAMD64MOVSDloadidx8:
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return rewriteValueAMD64_OpAMD64MOVSDloadidx8(v, config)
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case OpAMD64MOVSDstore:
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return rewriteValueAMD64_OpAMD64MOVSDstore(v, config)
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case OpAMD64MOVSDstoreidx8:
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return rewriteValueAMD64_OpAMD64MOVSDstoreidx8(v, config)
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case OpAMD64MOVSSload:
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return rewriteValueAMD64_OpAMD64MOVSSload(v, config)
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case OpAMD64MOVSSloadidx4:
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return rewriteValueAMD64_OpAMD64MOVSSloadidx4(v, config)
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case OpAMD64MOVSSstore:
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return rewriteValueAMD64_OpAMD64MOVSSstore(v, config)
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case OpAMD64MOVSSstoreidx4:
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return rewriteValueAMD64_OpAMD64MOVSSstoreidx4(v, config)
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case OpAMD64MOVWload:
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return rewriteValueAMD64_OpAMD64MOVWload(v, config)
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case OpAMD64MOVWstore:
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return rewriteValueAMD64_OpAMD64MOVWstore(v, config)
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case OpAMD64MOVWstoreconst:
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return rewriteValueAMD64_OpAMD64MOVWstoreconst(v, config)
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case OpAMD64MULB:
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return rewriteValueAMD64_OpAMD64MULB(v, config)
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case OpAMD64MULBconst:
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return rewriteValueAMD64_OpAMD64MULBconst(v, config)
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case OpAMD64MULL:
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return rewriteValueAMD64_OpAMD64MULL(v, config)
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case OpAMD64MULLconst:
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return rewriteValueAMD64_OpAMD64MULLconst(v, config)
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case OpAMD64MULQ:
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return rewriteValueAMD64_OpAMD64MULQ(v, config)
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case OpAMD64MULQconst:
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return rewriteValueAMD64_OpAMD64MULQconst(v, config)
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case OpAMD64MULW:
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return rewriteValueAMD64_OpAMD64MULW(v, config)
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case OpAMD64MULWconst:
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return rewriteValueAMD64_OpAMD64MULWconst(v, config)
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case OpMod16:
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return rewriteValueAMD64_OpMod16(v, config)
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case OpMod16u:
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return rewriteValueAMD64_OpMod16u(v, config)
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case OpMod32:
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return rewriteValueAMD64_OpMod32(v, config)
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case OpMod32u:
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return rewriteValueAMD64_OpMod32u(v, config)
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case OpMod64:
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return rewriteValueAMD64_OpMod64(v, config)
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case OpMod64u:
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return rewriteValueAMD64_OpMod64u(v, config)
|
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case OpMod8:
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return rewriteValueAMD64_OpMod8(v, config)
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case OpMod8u:
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return rewriteValueAMD64_OpMod8u(v, config)
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case OpMove:
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return rewriteValueAMD64_OpMove(v, config)
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case OpMul16:
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return rewriteValueAMD64_OpMul16(v, config)
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case OpMul32:
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return rewriteValueAMD64_OpMul32(v, config)
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case OpMul32F:
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return rewriteValueAMD64_OpMul32F(v, config)
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case OpMul64:
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return rewriteValueAMD64_OpMul64(v, config)
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case OpMul64F:
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return rewriteValueAMD64_OpMul64F(v, config)
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case OpMul8:
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return rewriteValueAMD64_OpMul8(v, config)
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case OpAMD64NEGB:
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return rewriteValueAMD64_OpAMD64NEGB(v, config)
|
|
case OpAMD64NEGL:
|
|
return rewriteValueAMD64_OpAMD64NEGL(v, config)
|
|
case OpAMD64NEGQ:
|
|
return rewriteValueAMD64_OpAMD64NEGQ(v, config)
|
|
case OpAMD64NEGW:
|
|
return rewriteValueAMD64_OpAMD64NEGW(v, config)
|
|
case OpAMD64NOTB:
|
|
return rewriteValueAMD64_OpAMD64NOTB(v, config)
|
|
case OpAMD64NOTL:
|
|
return rewriteValueAMD64_OpAMD64NOTL(v, config)
|
|
case OpAMD64NOTQ:
|
|
return rewriteValueAMD64_OpAMD64NOTQ(v, config)
|
|
case OpAMD64NOTW:
|
|
return rewriteValueAMD64_OpAMD64NOTW(v, config)
|
|
case OpNeg16:
|
|
return rewriteValueAMD64_OpNeg16(v, config)
|
|
case OpNeg32:
|
|
return rewriteValueAMD64_OpNeg32(v, config)
|
|
case OpNeg32F:
|
|
return rewriteValueAMD64_OpNeg32F(v, config)
|
|
case OpNeg64:
|
|
return rewriteValueAMD64_OpNeg64(v, config)
|
|
case OpNeg64F:
|
|
return rewriteValueAMD64_OpNeg64F(v, config)
|
|
case OpNeg8:
|
|
return rewriteValueAMD64_OpNeg8(v, config)
|
|
case OpNeq16:
|
|
return rewriteValueAMD64_OpNeq16(v, config)
|
|
case OpNeq32:
|
|
return rewriteValueAMD64_OpNeq32(v, config)
|
|
case OpNeq32F:
|
|
return rewriteValueAMD64_OpNeq32F(v, config)
|
|
case OpNeq64:
|
|
return rewriteValueAMD64_OpNeq64(v, config)
|
|
case OpNeq64F:
|
|
return rewriteValueAMD64_OpNeq64F(v, config)
|
|
case OpNeq8:
|
|
return rewriteValueAMD64_OpNeq8(v, config)
|
|
case OpNeqPtr:
|
|
return rewriteValueAMD64_OpNeqPtr(v, config)
|
|
case OpNilCheck:
|
|
return rewriteValueAMD64_OpNilCheck(v, config)
|
|
case OpNot:
|
|
return rewriteValueAMD64_OpNot(v, config)
|
|
case OpAMD64ORB:
|
|
return rewriteValueAMD64_OpAMD64ORB(v, config)
|
|
case OpAMD64ORBconst:
|
|
return rewriteValueAMD64_OpAMD64ORBconst(v, config)
|
|
case OpAMD64ORL:
|
|
return rewriteValueAMD64_OpAMD64ORL(v, config)
|
|
case OpAMD64ORLconst:
|
|
return rewriteValueAMD64_OpAMD64ORLconst(v, config)
|
|
case OpAMD64ORQ:
|
|
return rewriteValueAMD64_OpAMD64ORQ(v, config)
|
|
case OpAMD64ORQconst:
|
|
return rewriteValueAMD64_OpAMD64ORQconst(v, config)
|
|
case OpAMD64ORW:
|
|
return rewriteValueAMD64_OpAMD64ORW(v, config)
|
|
case OpAMD64ORWconst:
|
|
return rewriteValueAMD64_OpAMD64ORWconst(v, config)
|
|
case OpOffPtr:
|
|
return rewriteValueAMD64_OpOffPtr(v, config)
|
|
case OpOr16:
|
|
return rewriteValueAMD64_OpOr16(v, config)
|
|
case OpOr32:
|
|
return rewriteValueAMD64_OpOr32(v, config)
|
|
case OpOr64:
|
|
return rewriteValueAMD64_OpOr64(v, config)
|
|
case OpOr8:
|
|
return rewriteValueAMD64_OpOr8(v, config)
|
|
case OpRsh16Ux16:
|
|
return rewriteValueAMD64_OpRsh16Ux16(v, config)
|
|
case OpRsh16Ux32:
|
|
return rewriteValueAMD64_OpRsh16Ux32(v, config)
|
|
case OpRsh16Ux64:
|
|
return rewriteValueAMD64_OpRsh16Ux64(v, config)
|
|
case OpRsh16Ux8:
|
|
return rewriteValueAMD64_OpRsh16Ux8(v, config)
|
|
case OpRsh16x16:
|
|
return rewriteValueAMD64_OpRsh16x16(v, config)
|
|
case OpRsh16x32:
|
|
return rewriteValueAMD64_OpRsh16x32(v, config)
|
|
case OpRsh16x64:
|
|
return rewriteValueAMD64_OpRsh16x64(v, config)
|
|
case OpRsh16x8:
|
|
return rewriteValueAMD64_OpRsh16x8(v, config)
|
|
case OpRsh32Ux16:
|
|
return rewriteValueAMD64_OpRsh32Ux16(v, config)
|
|
case OpRsh32Ux32:
|
|
return rewriteValueAMD64_OpRsh32Ux32(v, config)
|
|
case OpRsh32Ux64:
|
|
return rewriteValueAMD64_OpRsh32Ux64(v, config)
|
|
case OpRsh32Ux8:
|
|
return rewriteValueAMD64_OpRsh32Ux8(v, config)
|
|
case OpRsh32x16:
|
|
return rewriteValueAMD64_OpRsh32x16(v, config)
|
|
case OpRsh32x32:
|
|
return rewriteValueAMD64_OpRsh32x32(v, config)
|
|
case OpRsh32x64:
|
|
return rewriteValueAMD64_OpRsh32x64(v, config)
|
|
case OpRsh32x8:
|
|
return rewriteValueAMD64_OpRsh32x8(v, config)
|
|
case OpRsh64Ux16:
|
|
return rewriteValueAMD64_OpRsh64Ux16(v, config)
|
|
case OpRsh64Ux32:
|
|
return rewriteValueAMD64_OpRsh64Ux32(v, config)
|
|
case OpRsh64Ux64:
|
|
return rewriteValueAMD64_OpRsh64Ux64(v, config)
|
|
case OpRsh64Ux8:
|
|
return rewriteValueAMD64_OpRsh64Ux8(v, config)
|
|
case OpRsh64x16:
|
|
return rewriteValueAMD64_OpRsh64x16(v, config)
|
|
case OpRsh64x32:
|
|
return rewriteValueAMD64_OpRsh64x32(v, config)
|
|
case OpRsh64x64:
|
|
return rewriteValueAMD64_OpRsh64x64(v, config)
|
|
case OpRsh64x8:
|
|
return rewriteValueAMD64_OpRsh64x8(v, config)
|
|
case OpRsh8Ux16:
|
|
return rewriteValueAMD64_OpRsh8Ux16(v, config)
|
|
case OpRsh8Ux32:
|
|
return rewriteValueAMD64_OpRsh8Ux32(v, config)
|
|
case OpRsh8Ux64:
|
|
return rewriteValueAMD64_OpRsh8Ux64(v, config)
|
|
case OpRsh8Ux8:
|
|
return rewriteValueAMD64_OpRsh8Ux8(v, config)
|
|
case OpRsh8x16:
|
|
return rewriteValueAMD64_OpRsh8x16(v, config)
|
|
case OpRsh8x32:
|
|
return rewriteValueAMD64_OpRsh8x32(v, config)
|
|
case OpRsh8x64:
|
|
return rewriteValueAMD64_OpRsh8x64(v, config)
|
|
case OpRsh8x8:
|
|
return rewriteValueAMD64_OpRsh8x8(v, config)
|
|
case OpAMD64SARB:
|
|
return rewriteValueAMD64_OpAMD64SARB(v, config)
|
|
case OpAMD64SARBconst:
|
|
return rewriteValueAMD64_OpAMD64SARBconst(v, config)
|
|
case OpAMD64SARL:
|
|
return rewriteValueAMD64_OpAMD64SARL(v, config)
|
|
case OpAMD64SARLconst:
|
|
return rewriteValueAMD64_OpAMD64SARLconst(v, config)
|
|
case OpAMD64SARQ:
|
|
return rewriteValueAMD64_OpAMD64SARQ(v, config)
|
|
case OpAMD64SARQconst:
|
|
return rewriteValueAMD64_OpAMD64SARQconst(v, config)
|
|
case OpAMD64SARW:
|
|
return rewriteValueAMD64_OpAMD64SARW(v, config)
|
|
case OpAMD64SARWconst:
|
|
return rewriteValueAMD64_OpAMD64SARWconst(v, config)
|
|
case OpAMD64SBBLcarrymask:
|
|
return rewriteValueAMD64_OpAMD64SBBLcarrymask(v, config)
|
|
case OpAMD64SBBQcarrymask:
|
|
return rewriteValueAMD64_OpAMD64SBBQcarrymask(v, config)
|
|
case OpAMD64SETA:
|
|
return rewriteValueAMD64_OpAMD64SETA(v, config)
|
|
case OpAMD64SETAE:
|
|
return rewriteValueAMD64_OpAMD64SETAE(v, config)
|
|
case OpAMD64SETB:
|
|
return rewriteValueAMD64_OpAMD64SETB(v, config)
|
|
case OpAMD64SETBE:
|
|
return rewriteValueAMD64_OpAMD64SETBE(v, config)
|
|
case OpAMD64SETEQ:
|
|
return rewriteValueAMD64_OpAMD64SETEQ(v, config)
|
|
case OpAMD64SETG:
|
|
return rewriteValueAMD64_OpAMD64SETG(v, config)
|
|
case OpAMD64SETGE:
|
|
return rewriteValueAMD64_OpAMD64SETGE(v, config)
|
|
case OpAMD64SETL:
|
|
return rewriteValueAMD64_OpAMD64SETL(v, config)
|
|
case OpAMD64SETLE:
|
|
return rewriteValueAMD64_OpAMD64SETLE(v, config)
|
|
case OpAMD64SETNE:
|
|
return rewriteValueAMD64_OpAMD64SETNE(v, config)
|
|
case OpAMD64SHLB:
|
|
return rewriteValueAMD64_OpAMD64SHLB(v, config)
|
|
case OpAMD64SHLL:
|
|
return rewriteValueAMD64_OpAMD64SHLL(v, config)
|
|
case OpAMD64SHLQ:
|
|
return rewriteValueAMD64_OpAMD64SHLQ(v, config)
|
|
case OpAMD64SHLW:
|
|
return rewriteValueAMD64_OpAMD64SHLW(v, config)
|
|
case OpAMD64SHRB:
|
|
return rewriteValueAMD64_OpAMD64SHRB(v, config)
|
|
case OpAMD64SHRL:
|
|
return rewriteValueAMD64_OpAMD64SHRL(v, config)
|
|
case OpAMD64SHRQ:
|
|
return rewriteValueAMD64_OpAMD64SHRQ(v, config)
|
|
case OpAMD64SHRW:
|
|
return rewriteValueAMD64_OpAMD64SHRW(v, config)
|
|
case OpAMD64SUBB:
|
|
return rewriteValueAMD64_OpAMD64SUBB(v, config)
|
|
case OpAMD64SUBBconst:
|
|
return rewriteValueAMD64_OpAMD64SUBBconst(v, config)
|
|
case OpAMD64SUBL:
|
|
return rewriteValueAMD64_OpAMD64SUBL(v, config)
|
|
case OpAMD64SUBLconst:
|
|
return rewriteValueAMD64_OpAMD64SUBLconst(v, config)
|
|
case OpAMD64SUBQ:
|
|
return rewriteValueAMD64_OpAMD64SUBQ(v, config)
|
|
case OpAMD64SUBQconst:
|
|
return rewriteValueAMD64_OpAMD64SUBQconst(v, config)
|
|
case OpAMD64SUBW:
|
|
return rewriteValueAMD64_OpAMD64SUBW(v, config)
|
|
case OpAMD64SUBWconst:
|
|
return rewriteValueAMD64_OpAMD64SUBWconst(v, config)
|
|
case OpSignExt16to32:
|
|
return rewriteValueAMD64_OpSignExt16to32(v, config)
|
|
case OpSignExt16to64:
|
|
return rewriteValueAMD64_OpSignExt16to64(v, config)
|
|
case OpSignExt32to64:
|
|
return rewriteValueAMD64_OpSignExt32to64(v, config)
|
|
case OpSignExt8to16:
|
|
return rewriteValueAMD64_OpSignExt8to16(v, config)
|
|
case OpSignExt8to32:
|
|
return rewriteValueAMD64_OpSignExt8to32(v, config)
|
|
case OpSignExt8to64:
|
|
return rewriteValueAMD64_OpSignExt8to64(v, config)
|
|
case OpSqrt:
|
|
return rewriteValueAMD64_OpSqrt(v, config)
|
|
case OpStaticCall:
|
|
return rewriteValueAMD64_OpStaticCall(v, config)
|
|
case OpStore:
|
|
return rewriteValueAMD64_OpStore(v, config)
|
|
case OpSub16:
|
|
return rewriteValueAMD64_OpSub16(v, config)
|
|
case OpSub32:
|
|
return rewriteValueAMD64_OpSub32(v, config)
|
|
case OpSub32F:
|
|
return rewriteValueAMD64_OpSub32F(v, config)
|
|
case OpSub64:
|
|
return rewriteValueAMD64_OpSub64(v, config)
|
|
case OpSub64F:
|
|
return rewriteValueAMD64_OpSub64F(v, config)
|
|
case OpSub8:
|
|
return rewriteValueAMD64_OpSub8(v, config)
|
|
case OpSubPtr:
|
|
return rewriteValueAMD64_OpSubPtr(v, config)
|
|
case OpTrunc16to8:
|
|
return rewriteValueAMD64_OpTrunc16to8(v, config)
|
|
case OpTrunc32to16:
|
|
return rewriteValueAMD64_OpTrunc32to16(v, config)
|
|
case OpTrunc32to8:
|
|
return rewriteValueAMD64_OpTrunc32to8(v, config)
|
|
case OpTrunc64to16:
|
|
return rewriteValueAMD64_OpTrunc64to16(v, config)
|
|
case OpTrunc64to32:
|
|
return rewriteValueAMD64_OpTrunc64to32(v, config)
|
|
case OpTrunc64to8:
|
|
return rewriteValueAMD64_OpTrunc64to8(v, config)
|
|
case OpAMD64XORB:
|
|
return rewriteValueAMD64_OpAMD64XORB(v, config)
|
|
case OpAMD64XORBconst:
|
|
return rewriteValueAMD64_OpAMD64XORBconst(v, config)
|
|
case OpAMD64XORL:
|
|
return rewriteValueAMD64_OpAMD64XORL(v, config)
|
|
case OpAMD64XORLconst:
|
|
return rewriteValueAMD64_OpAMD64XORLconst(v, config)
|
|
case OpAMD64XORQ:
|
|
return rewriteValueAMD64_OpAMD64XORQ(v, config)
|
|
case OpAMD64XORQconst:
|
|
return rewriteValueAMD64_OpAMD64XORQconst(v, config)
|
|
case OpAMD64XORW:
|
|
return rewriteValueAMD64_OpAMD64XORW(v, config)
|
|
case OpAMD64XORWconst:
|
|
return rewriteValueAMD64_OpAMD64XORWconst(v, config)
|
|
case OpXor16:
|
|
return rewriteValueAMD64_OpXor16(v, config)
|
|
case OpXor32:
|
|
return rewriteValueAMD64_OpXor32(v, config)
|
|
case OpXor64:
|
|
return rewriteValueAMD64_OpXor64(v, config)
|
|
case OpXor8:
|
|
return rewriteValueAMD64_OpXor8(v, config)
|
|
case OpZero:
|
|
return rewriteValueAMD64_OpZero(v, config)
|
|
case OpZeroExt16to32:
|
|
return rewriteValueAMD64_OpZeroExt16to32(v, config)
|
|
case OpZeroExt16to64:
|
|
return rewriteValueAMD64_OpZeroExt16to64(v, config)
|
|
case OpZeroExt32to64:
|
|
return rewriteValueAMD64_OpZeroExt32to64(v, config)
|
|
case OpZeroExt8to16:
|
|
return rewriteValueAMD64_OpZeroExt8to16(v, config)
|
|
case OpZeroExt8to32:
|
|
return rewriteValueAMD64_OpZeroExt8to32(v, config)
|
|
case OpZeroExt8to64:
|
|
return rewriteValueAMD64_OpZeroExt8to64(v, config)
|
|
}
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (ADDBconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto endab690db69bfd8192eea57a2f9f76bf84
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ADDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endab690db69bfd8192eea57a2f9f76bf84
|
|
endab690db69bfd8192eea57a2f9f76bf84:
|
|
;
|
|
// match: (ADDB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (ADDBconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end28aa1a4abe7e1abcdd64135e9967d39d
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ADDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end28aa1a4abe7e1abcdd64135e9967d39d
|
|
end28aa1a4abe7e1abcdd64135e9967d39d:
|
|
;
|
|
// match: (ADDB x (NEGB y))
|
|
// cond:
|
|
// result: (SUBB x y)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64NEGB {
|
|
goto end9464509b8874ffb00b43b843da01f0bc
|
|
}
|
|
y := v.Args[1].Args[0]
|
|
v.Op = OpAMD64SUBB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end9464509b8874ffb00b43b843da01f0bc
|
|
end9464509b8874ffb00b43b843da01f0bc:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDBconst [c] x)
|
|
// cond: int8(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int8(c) == 0) {
|
|
goto end3fbe38dfc1de8f48c755862c4c8b6bac
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end3fbe38dfc1de8f48c755862c4c8b6bac
|
|
end3fbe38dfc1de8f48c755862c4c8b6bac:
|
|
;
|
|
// match: (ADDBconst [c] (MOVBconst [d]))
|
|
// cond:
|
|
// result: (MOVBconst [c+d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto enda9b1e9e31ccdf0af5f4fe57bf4b1343f
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
return true
|
|
}
|
|
goto enda9b1e9e31ccdf0af5f4fe57bf4b1343f
|
|
enda9b1e9e31ccdf0af5f4fe57bf4b1343f:
|
|
;
|
|
// match: (ADDBconst [c] (ADDBconst [d] x))
|
|
// cond:
|
|
// result: (ADDBconst [c+d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64ADDBconst {
|
|
goto end9b1e6890adbf9d9e447d591b4148cbd0
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end9b1e6890adbf9d9e447d591b4148cbd0
|
|
end9b1e6890adbf9d9e447d591b4148cbd0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (ADDLconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end8d6d3b99a7be8da6b7a254b7e709cc95
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ADDLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end8d6d3b99a7be8da6b7a254b7e709cc95
|
|
end8d6d3b99a7be8da6b7a254b7e709cc95:
|
|
;
|
|
// match: (ADDL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (ADDLconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end739561e08a561e26ce3634dc0d5ec733
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ADDLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end739561e08a561e26ce3634dc0d5ec733
|
|
end739561e08a561e26ce3634dc0d5ec733:
|
|
;
|
|
// match: (ADDL x (NEGL y))
|
|
// cond:
|
|
// result: (SUBL x y)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64NEGL {
|
|
goto end9596df31f2685a49df67c6fb912a521d
|
|
}
|
|
y := v.Args[1].Args[0]
|
|
v.Op = OpAMD64SUBL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end9596df31f2685a49df67c6fb912a521d
|
|
end9596df31f2685a49df67c6fb912a521d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDLconst [c] x)
|
|
// cond: int32(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int32(c) == 0) {
|
|
goto endf04fb6232fbd3b460bb0d1bdcdc57d65
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endf04fb6232fbd3b460bb0d1bdcdc57d65
|
|
endf04fb6232fbd3b460bb0d1bdcdc57d65:
|
|
;
|
|
// match: (ADDLconst [c] (MOVLconst [d]))
|
|
// cond:
|
|
// result: (MOVLconst [c+d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto ende04850e987890abf1d66199042a19c23
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
return true
|
|
}
|
|
goto ende04850e987890abf1d66199042a19c23
|
|
ende04850e987890abf1d66199042a19c23:
|
|
;
|
|
// match: (ADDLconst [c] (ADDLconst [d] x))
|
|
// cond:
|
|
// result: (ADDLconst [c+d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64ADDLconst {
|
|
goto endf1dd8673b2fef4950aec87aa7523a236
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endf1dd8673b2fef4950aec87aa7523a236
|
|
endf1dd8673b2fef4950aec87aa7523a236:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (ADDQconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end1de8aeb1d043e0dadcffd169a99ce5c0
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto end1de8aeb1d043e0dadcffd169a99ce5c0
|
|
}
|
|
v.Op = OpAMD64ADDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1de8aeb1d043e0dadcffd169a99ce5c0
|
|
end1de8aeb1d043e0dadcffd169a99ce5c0:
|
|
;
|
|
// match: (ADDQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (ADDQconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto endca635e3bdecd9e3aeb892f841021dfaa
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto endca635e3bdecd9e3aeb892f841021dfaa
|
|
}
|
|
v.Op = OpAMD64ADDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endca635e3bdecd9e3aeb892f841021dfaa
|
|
endca635e3bdecd9e3aeb892f841021dfaa:
|
|
;
|
|
// match: (ADDQ x (SHLQconst [3] y))
|
|
// cond:
|
|
// result: (LEAQ8 x y)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64SHLQconst {
|
|
goto endc02313d35a0525d1d680cd58992e820d
|
|
}
|
|
if v.Args[1].AuxInt != 3 {
|
|
goto endc02313d35a0525d1d680cd58992e820d
|
|
}
|
|
y := v.Args[1].Args[0]
|
|
v.Op = OpAMD64LEAQ8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endc02313d35a0525d1d680cd58992e820d
|
|
endc02313d35a0525d1d680cd58992e820d:
|
|
;
|
|
// match: (ADDQ x (NEGQ y))
|
|
// cond:
|
|
// result: (SUBQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64NEGQ {
|
|
goto endec8f899c6e175a0147a90750f9bfe0a2
|
|
}
|
|
y := v.Args[1].Args[0]
|
|
v.Op = OpAMD64SUBQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endec8f899c6e175a0147a90750f9bfe0a2
|
|
endec8f899c6e175a0147a90750f9bfe0a2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDQconst [c] (LEAQ8 [d] x y))
|
|
// cond:
|
|
// result: (LEAQ8 [addOff(c, d)] x y)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64LEAQ8 {
|
|
goto ende2cc681c9abf9913288803fb1b39e639
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
y := v.Args[0].Args[1]
|
|
v.Op = OpAMD64LEAQ8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(c, d)
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto ende2cc681c9abf9913288803fb1b39e639
|
|
ende2cc681c9abf9913288803fb1b39e639:
|
|
;
|
|
// match: (ADDQconst [0] x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto end03d9f5a3e153048b0afa781401e2a849
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end03d9f5a3e153048b0afa781401e2a849
|
|
end03d9f5a3e153048b0afa781401e2a849:
|
|
;
|
|
// match: (ADDQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [c+d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end09dc54395b4e96e8332cf8e4e7481c52
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
return true
|
|
}
|
|
goto end09dc54395b4e96e8332cf8e4e7481c52
|
|
end09dc54395b4e96e8332cf8e4e7481c52:
|
|
;
|
|
// match: (ADDQconst [c] (ADDQconst [d] x))
|
|
// cond:
|
|
// result: (ADDQconst [c+d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endd4cb539641f0dc40bfd0cb7fbb9b0405
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd4cb539641f0dc40bfd0cb7fbb9b0405
|
|
endd4cb539641f0dc40bfd0cb7fbb9b0405:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (ADDWconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end1aabd2317de77c7dfc4876fd7e4c5011
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ADDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1aabd2317de77c7dfc4876fd7e4c5011
|
|
end1aabd2317de77c7dfc4876fd7e4c5011:
|
|
;
|
|
// match: (ADDW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (ADDWconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto ende3aede99966f388afc624f9e86676fd2
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ADDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto ende3aede99966f388afc624f9e86676fd2
|
|
ende3aede99966f388afc624f9e86676fd2:
|
|
;
|
|
// match: (ADDW x (NEGW y))
|
|
// cond:
|
|
// result: (SUBW x y)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64NEGW {
|
|
goto end55cf2af0d75f3ec413528eeb799e94d5
|
|
}
|
|
y := v.Args[1].Args[0]
|
|
v.Op = OpAMD64SUBW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end55cf2af0d75f3ec413528eeb799e94d5
|
|
end55cf2af0d75f3ec413528eeb799e94d5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ADDWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ADDWconst [c] x)
|
|
// cond: int16(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int16(c) == 0) {
|
|
goto end8564670ff18b2a91eb92d5e5775464cd
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end8564670ff18b2a91eb92d5e5775464cd
|
|
end8564670ff18b2a91eb92d5e5775464cd:
|
|
;
|
|
// match: (ADDWconst [c] (MOVWconst [d]))
|
|
// cond:
|
|
// result: (MOVWconst [c+d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end32541920f2f5a920dfae41d8ebbef00f
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
return true
|
|
}
|
|
goto end32541920f2f5a920dfae41d8ebbef00f
|
|
end32541920f2f5a920dfae41d8ebbef00f:
|
|
;
|
|
// match: (ADDWconst [c] (ADDWconst [d] x))
|
|
// cond:
|
|
// result: (ADDWconst [c+d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64ADDWconst {
|
|
goto end73944f6ddda7e4c050f11d17484ff9a5
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c + d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end73944f6ddda7e4c050f11d17484ff9a5
|
|
end73944f6ddda7e4c050f11d17484ff9a5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDB x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (ANDBconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end01100cd255396e29bfdb130f4fbc9bbc
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ANDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end01100cd255396e29bfdb130f4fbc9bbc
|
|
end01100cd255396e29bfdb130f4fbc9bbc:
|
|
;
|
|
// match: (ANDB (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (ANDBconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end70830ce2834dc5f8d786fa6789460926
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ANDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end70830ce2834dc5f8d786fa6789460926
|
|
end70830ce2834dc5f8d786fa6789460926:
|
|
;
|
|
// match: (ANDB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (ANDBconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto endd275ec2e73768cb3d201478fc934e06c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ANDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd275ec2e73768cb3d201478fc934e06c
|
|
endd275ec2e73768cb3d201478fc934e06c:
|
|
;
|
|
// match: (ANDB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (ANDBconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end4068edac2ae0f354cf581db210288b98
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ANDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end4068edac2ae0f354cf581db210288b98
|
|
end4068edac2ae0f354cf581db210288b98:
|
|
;
|
|
// match: (ANDB x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto endb8ff272a1456513da708603abe37541c
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endb8ff272a1456513da708603abe37541c
|
|
endb8ff272a1456513da708603abe37541c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDBconst [c] _)
|
|
// cond: int8(c)==0
|
|
// result: (MOVBconst [0])
|
|
{
|
|
c := v.AuxInt
|
|
if !(int8(c) == 0) {
|
|
goto end2106d410c949da14d7c00041f40eca76
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end2106d410c949da14d7c00041f40eca76
|
|
end2106d410c949da14d7c00041f40eca76:
|
|
;
|
|
// match: (ANDBconst [c] x)
|
|
// cond: int8(c)==-1
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int8(c) == -1) {
|
|
goto enda0b78503c204c8225de1433949a71fe4
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda0b78503c204c8225de1433949a71fe4
|
|
enda0b78503c204c8225de1433949a71fe4:
|
|
;
|
|
// match: (ANDBconst [c] (MOVBconst [d]))
|
|
// cond:
|
|
// result: (MOVBconst [c&d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end946312b1f216933da86febe293eb956f
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & d
|
|
return true
|
|
}
|
|
goto end946312b1f216933da86febe293eb956f
|
|
end946312b1f216933da86febe293eb956f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (ANDLconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end0a4c49d9a26759c0fd21369dafcd7abb
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ANDLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0a4c49d9a26759c0fd21369dafcd7abb
|
|
end0a4c49d9a26759c0fd21369dafcd7abb:
|
|
;
|
|
// match: (ANDL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (ANDLconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end0529ba323d9b6f15c41add401ef67959
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ANDLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0529ba323d9b6f15c41add401ef67959
|
|
end0529ba323d9b6f15c41add401ef67959:
|
|
;
|
|
// match: (ANDL x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto enddfb08a0d0c262854db3905cb323388c7
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enddfb08a0d0c262854db3905cb323388c7
|
|
enddfb08a0d0c262854db3905cb323388c7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDLconst [c] _)
|
|
// cond: int32(c)==0
|
|
// result: (MOVLconst [0])
|
|
{
|
|
c := v.AuxInt
|
|
if !(int32(c) == 0) {
|
|
goto end5efb241208aef28c950b7bcf8d85d5de
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end5efb241208aef28c950b7bcf8d85d5de
|
|
end5efb241208aef28c950b7bcf8d85d5de:
|
|
;
|
|
// match: (ANDLconst [c] x)
|
|
// cond: int32(c)==-1
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int32(c) == -1) {
|
|
goto end0e852ae30bb8289d6ffee0c9267e3e0c
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0e852ae30bb8289d6ffee0c9267e3e0c
|
|
end0e852ae30bb8289d6ffee0c9267e3e0c:
|
|
;
|
|
// match: (ANDLconst [c] (MOVLconst [d]))
|
|
// cond:
|
|
// result: (MOVLconst [c&d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end7bfd24059369753eadd235f07e2dd7b8
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & d
|
|
return true
|
|
}
|
|
goto end7bfd24059369753eadd235f07e2dd7b8
|
|
end7bfd24059369753eadd235f07e2dd7b8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (ANDQconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end048fadc69e81103480015b84b9cafff7
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto end048fadc69e81103480015b84b9cafff7
|
|
}
|
|
v.Op = OpAMD64ANDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end048fadc69e81103480015b84b9cafff7
|
|
end048fadc69e81103480015b84b9cafff7:
|
|
;
|
|
// match: (ANDQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (ANDQconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end3035a3bf650b708705fd27dd857ab0a4
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto end3035a3bf650b708705fd27dd857ab0a4
|
|
}
|
|
v.Op = OpAMD64ANDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end3035a3bf650b708705fd27dd857ab0a4
|
|
end3035a3bf650b708705fd27dd857ab0a4:
|
|
;
|
|
// match: (ANDQ x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end06b5ec19efdd4e79f03a5e4a2c3c3427
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end06b5ec19efdd4e79f03a5e4a2c3c3427
|
|
end06b5ec19efdd4e79f03a5e4a2c3c3427:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDQconst [0] _)
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto end57018c1d0f54fd721521095b4832bab2
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end57018c1d0f54fd721521095b4832bab2
|
|
end57018c1d0f54fd721521095b4832bab2:
|
|
;
|
|
// match: (ANDQconst [-1] x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
if v.AuxInt != -1 {
|
|
goto endb542c4b42ab94a7bedb32dec8f610d67
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endb542c4b42ab94a7bedb32dec8f610d67
|
|
endb542c4b42ab94a7bedb32dec8f610d67:
|
|
;
|
|
// match: (ANDQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [c&d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end67ca66494705b0345a5f22c710225292
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & d
|
|
return true
|
|
}
|
|
goto end67ca66494705b0345a5f22c710225292
|
|
end67ca66494705b0345a5f22c710225292:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDW x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (ANDWconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto endce6f557823ee2fdd7a8f47b6f925fc7c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ANDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endce6f557823ee2fdd7a8f47b6f925fc7c
|
|
endce6f557823ee2fdd7a8f47b6f925fc7c:
|
|
;
|
|
// match: (ANDW (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (ANDWconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto endc46af0d9265c08b09f1f1fba24feda80
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ANDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endc46af0d9265c08b09f1f1fba24feda80
|
|
endc46af0d9265c08b09f1f1fba24feda80:
|
|
;
|
|
// match: (ANDW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (ANDWconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto enda77a39f65a5eb3436a5842eab69a3103
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ANDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda77a39f65a5eb3436a5842eab69a3103
|
|
enda77a39f65a5eb3436a5842eab69a3103:
|
|
;
|
|
// match: (ANDW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (ANDWconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto endea2a25eb525a5dbf6d5132d84ea4e7a5
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ANDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endea2a25eb525a5dbf6d5132d84ea4e7a5
|
|
endea2a25eb525a5dbf6d5132d84ea4e7a5:
|
|
;
|
|
// match: (ANDW x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end3a26cf52dd1b77f07cc9e005760dbb11
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end3a26cf52dd1b77f07cc9e005760dbb11
|
|
end3a26cf52dd1b77f07cc9e005760dbb11:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ANDWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ANDWconst [c] _)
|
|
// cond: int16(c)==0
|
|
// result: (MOVWconst [0])
|
|
{
|
|
c := v.AuxInt
|
|
if !(int16(c) == 0) {
|
|
goto end336ece33b4f0fb44dfe1f24981df7b74
|
|
}
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end336ece33b4f0fb44dfe1f24981df7b74
|
|
end336ece33b4f0fb44dfe1f24981df7b74:
|
|
;
|
|
// match: (ANDWconst [c] x)
|
|
// cond: int16(c)==-1
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int16(c) == -1) {
|
|
goto endfb111c3afa8c5c4040fa6000fadee810
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endfb111c3afa8c5c4040fa6000fadee810
|
|
endfb111c3afa8c5c4040fa6000fadee810:
|
|
;
|
|
// match: (ANDWconst [c] (MOVWconst [d]))
|
|
// cond:
|
|
// result: (MOVWconst [c&d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end250eb27fcac10bf6c0d96ce66a21726e
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & d
|
|
return true
|
|
}
|
|
goto end250eb27fcac10bf6c0d96ce66a21726e
|
|
end250eb27fcac10bf6c0d96ce66a21726e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAdd16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Add16 x y)
|
|
// cond:
|
|
// result: (ADDW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto ende604481c6de9fe4574cb2954ba2ddc67
|
|
ende604481c6de9fe4574cb2954ba2ddc67:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAdd32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Add32 x y)
|
|
// cond:
|
|
// result: (ADDL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endc445ea2a65385445676cd684ae9a42b5
|
|
endc445ea2a65385445676cd684ae9a42b5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAdd32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Add32F x y)
|
|
// cond:
|
|
// result: (ADDSS x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDSS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end5d82e1c10823774894c036b7c5b8fed4
|
|
end5d82e1c10823774894c036b7c5b8fed4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAdd64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Add64 x y)
|
|
// cond:
|
|
// result: (ADDQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endd88f18b3f39e3ccc201477a616f0abc0
|
|
endd88f18b3f39e3ccc201477a616f0abc0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAdd64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Add64F x y)
|
|
// cond:
|
|
// result: (ADDSD x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDSD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end62f2de6c70abd214e6987ee37976653a
|
|
end62f2de6c70abd214e6987ee37976653a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAdd8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Add8 x y)
|
|
// cond:
|
|
// result: (ADDB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end6117c84a6b75c1b816b3fb095bc5f656
|
|
end6117c84a6b75c1b816b3fb095bc5f656:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAddPtr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (AddPtr x y)
|
|
// cond:
|
|
// result: (ADDQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ADDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto enda1d5640788c7157996f9d4af602dec1c
|
|
enda1d5640788c7157996f9d4af602dec1c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAddr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Addr {sym} base)
|
|
// cond:
|
|
// result: (LEAQ {sym} base)
|
|
{
|
|
sym := v.Aux
|
|
base := v.Args[0]
|
|
v.Op = OpAMD64LEAQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Aux = sym
|
|
v.AddArg(base)
|
|
return true
|
|
}
|
|
goto end53cad0c3c9daa5575680e77c14e05e72
|
|
end53cad0c3c9daa5575680e77c14e05e72:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAnd16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (And16 x y)
|
|
// cond:
|
|
// result: (ANDW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end1c01f04a173d86ce1a6d1ef59e753014
|
|
end1c01f04a173d86ce1a6d1ef59e753014:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAnd32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (And32 x y)
|
|
// cond:
|
|
// result: (ANDL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end6b9eb9375b3a859028a6ba6bf6b8ec88
|
|
end6b9eb9375b3a859028a6ba6bf6b8ec88:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAnd64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (And64 x y)
|
|
// cond:
|
|
// result: (ANDQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto enda0bde5853819d05fa2b7d3b723629552
|
|
enda0bde5853819d05fa2b7d3b723629552:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAnd8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (And8 x y)
|
|
// cond:
|
|
// result: (ANDB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end0f53bee6291f1229b43aa1b5f977b4f2
|
|
end0f53bee6291f1229b43aa1b5f977b4f2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (CMPBconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto end52190c0b8759133aa6c540944965c4c0
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64CMPBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end52190c0b8759133aa6c540944965c4c0
|
|
end52190c0b8759133aa6c540944965c4c0:
|
|
;
|
|
// match: (CMPB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (InvertFlags (CMPBconst x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end25ab646f9eb8749ea58c8fbbb4bf6bcd
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64InvertFlags
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end25ab646f9eb8749ea58c8fbbb4bf6bcd
|
|
end25ab646f9eb8749ea58c8fbbb4bf6bcd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPBconst (MOVBconst [x]) [y])
|
|
// cond: int8(x)==int8(y)
|
|
// result: (FlagEQ)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end1be300bd80b7d8cd0fa37e1907c75a77
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int8(x) == int8(y)) {
|
|
goto end1be300bd80b7d8cd0fa37e1907c75a77
|
|
}
|
|
v.Op = OpAMD64FlagEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end1be300bd80b7d8cd0fa37e1907c75a77
|
|
end1be300bd80b7d8cd0fa37e1907c75a77:
|
|
;
|
|
// match: (CMPBconst (MOVBconst [x]) [y])
|
|
// cond: int8(x)<int8(y) && uint8(x)<uint8(y)
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endbe76e73088c59765dd0132e2ac15fc6e
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int8(x) < int8(y) && uint8(x) < uint8(y)) {
|
|
goto endbe76e73088c59765dd0132e2ac15fc6e
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endbe76e73088c59765dd0132e2ac15fc6e
|
|
endbe76e73088c59765dd0132e2ac15fc6e:
|
|
;
|
|
// match: (CMPBconst (MOVBconst [x]) [y])
|
|
// cond: int8(x)<int8(y) && uint8(x)>uint8(y)
|
|
// result: (FlagLT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endbfa2ca974f69ec9ceb8a24ad6db45efb
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int8(x) < int8(y) && uint8(x) > uint8(y)) {
|
|
goto endbfa2ca974f69ec9ceb8a24ad6db45efb
|
|
}
|
|
v.Op = OpAMD64FlagLT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endbfa2ca974f69ec9ceb8a24ad6db45efb
|
|
endbfa2ca974f69ec9ceb8a24ad6db45efb:
|
|
;
|
|
// match: (CMPBconst (MOVBconst [x]) [y])
|
|
// cond: int8(x)>int8(y) && uint8(x)<uint8(y)
|
|
// result: (FlagGT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end68ac2e7dcb3704e235e1c292669320ed
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int8(x) > int8(y) && uint8(x) < uint8(y)) {
|
|
goto end68ac2e7dcb3704e235e1c292669320ed
|
|
}
|
|
v.Op = OpAMD64FlagGT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end68ac2e7dcb3704e235e1c292669320ed
|
|
end68ac2e7dcb3704e235e1c292669320ed:
|
|
;
|
|
// match: (CMPBconst (MOVBconst [x]) [y])
|
|
// cond: int8(x)>int8(y) && uint8(x)>uint8(y)
|
|
// result: (FlagGT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endac1c49c82fb6b76dd324042c4588973c
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int8(x) > int8(y) && uint8(x) > uint8(y)) {
|
|
goto endac1c49c82fb6b76dd324042c4588973c
|
|
}
|
|
v.Op = OpAMD64FlagGT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endac1c49c82fb6b76dd324042c4588973c
|
|
endac1c49c82fb6b76dd324042c4588973c:
|
|
;
|
|
// match: (CMPBconst (ANDBconst _ [m]) [n])
|
|
// cond: int8(m)+1==int8(n) && isPowerOfTwo(int64(int8(n)))
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64ANDBconst {
|
|
goto end82aa9d89330cb5dc58592048bfc16ebc
|
|
}
|
|
m := v.Args[0].AuxInt
|
|
n := v.AuxInt
|
|
if !(int8(m)+1 == int8(n) && isPowerOfTwo(int64(int8(n)))) {
|
|
goto end82aa9d89330cb5dc58592048bfc16ebc
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end82aa9d89330cb5dc58592048bfc16ebc
|
|
end82aa9d89330cb5dc58592048bfc16ebc:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (CMPLconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end49ff4559c4bdecb2aef0c905e2d9a6cf
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64CMPLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end49ff4559c4bdecb2aef0c905e2d9a6cf
|
|
end49ff4559c4bdecb2aef0c905e2d9a6cf:
|
|
;
|
|
// match: (CMPL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (InvertFlags (CMPLconst x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end7d89230086678ab4ed5cc96a3ae358d6
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64InvertFlags
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end7d89230086678ab4ed5cc96a3ae358d6
|
|
end7d89230086678ab4ed5cc96a3ae358d6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPLconst (MOVLconst [x]) [y])
|
|
// cond: int32(x)==int32(y)
|
|
// result: (FlagEQ)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end7c53f3fc20f710e60f327bf63b4c8d4e
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int32(x) == int32(y)) {
|
|
goto end7c53f3fc20f710e60f327bf63b4c8d4e
|
|
}
|
|
v.Op = OpAMD64FlagEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end7c53f3fc20f710e60f327bf63b4c8d4e
|
|
end7c53f3fc20f710e60f327bf63b4c8d4e:
|
|
;
|
|
// match: (CMPLconst (MOVLconst [x]) [y])
|
|
// cond: int32(x)<int32(y) && uint32(x)<uint32(y)
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto enda12309892d1f4166bfffc9aa62b37111
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int32(x) < int32(y) && uint32(x) < uint32(y)) {
|
|
goto enda12309892d1f4166bfffc9aa62b37111
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto enda12309892d1f4166bfffc9aa62b37111
|
|
enda12309892d1f4166bfffc9aa62b37111:
|
|
;
|
|
// match: (CMPLconst (MOVLconst [x]) [y])
|
|
// cond: int32(x)<int32(y) && uint32(x)>uint32(y)
|
|
// result: (FlagLT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end66603988bfeb71e410328b40425c3418
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int32(x) < int32(y) && uint32(x) > uint32(y)) {
|
|
goto end66603988bfeb71e410328b40425c3418
|
|
}
|
|
v.Op = OpAMD64FlagLT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end66603988bfeb71e410328b40425c3418
|
|
end66603988bfeb71e410328b40425c3418:
|
|
;
|
|
// match: (CMPLconst (MOVLconst [x]) [y])
|
|
// cond: int32(x)>int32(y) && uint32(x)<uint32(y)
|
|
// result: (FlagGT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto endb1b0b14302e765637328dade12e1ce87
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int32(x) > int32(y) && uint32(x) < uint32(y)) {
|
|
goto endb1b0b14302e765637328dade12e1ce87
|
|
}
|
|
v.Op = OpAMD64FlagGT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endb1b0b14302e765637328dade12e1ce87
|
|
endb1b0b14302e765637328dade12e1ce87:
|
|
;
|
|
// match: (CMPLconst (MOVLconst [x]) [y])
|
|
// cond: int32(x)>int32(y) && uint32(x)>uint32(y)
|
|
// result: (FlagGT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto endc7b8e86e537d6e106e237023dc2c9a7b
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int32(x) > int32(y) && uint32(x) > uint32(y)) {
|
|
goto endc7b8e86e537d6e106e237023dc2c9a7b
|
|
}
|
|
v.Op = OpAMD64FlagGT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endc7b8e86e537d6e106e237023dc2c9a7b
|
|
endc7b8e86e537d6e106e237023dc2c9a7b:
|
|
;
|
|
// match: (CMPLconst (ANDLconst _ [m]) [n])
|
|
// cond: int32(m)+1==int32(n) && isPowerOfTwo(int64(int32(n)))
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64ANDLconst {
|
|
goto endf202b9830a1e45f3888f2598c762c702
|
|
}
|
|
m := v.Args[0].AuxInt
|
|
n := v.AuxInt
|
|
if !(int32(m)+1 == int32(n) && isPowerOfTwo(int64(int32(n)))) {
|
|
goto endf202b9830a1e45f3888f2598c762c702
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endf202b9830a1e45f3888f2598c762c702
|
|
endf202b9830a1e45f3888f2598c762c702:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (CMPQconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end3bbb2c6caa57853a7561738ce3c0c630
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto end3bbb2c6caa57853a7561738ce3c0c630
|
|
}
|
|
v.Op = OpAMD64CMPQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end3bbb2c6caa57853a7561738ce3c0c630
|
|
end3bbb2c6caa57853a7561738ce3c0c630:
|
|
;
|
|
// match: (CMPQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (InvertFlags (CMPQconst x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end153e951c4d9890ee40bf6f189ff6280e
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto end153e951c4d9890ee40bf6f189ff6280e
|
|
}
|
|
v.Op = OpAMD64InvertFlags
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end153e951c4d9890ee40bf6f189ff6280e
|
|
end153e951c4d9890ee40bf6f189ff6280e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPQconst (MOVQconst [x]) [y])
|
|
// cond: x==y
|
|
// result: (FlagEQ)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto enda7a434ec055a51246d67ff14b48e455d
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(x == y) {
|
|
goto enda7a434ec055a51246d67ff14b48e455d
|
|
}
|
|
v.Op = OpAMD64FlagEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto enda7a434ec055a51246d67ff14b48e455d
|
|
enda7a434ec055a51246d67ff14b48e455d:
|
|
;
|
|
// match: (CMPQconst (MOVQconst [x]) [y])
|
|
// cond: x<y && uint64(x)<uint64(y)
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end88f2277949392f2b8d03934fd812d3ee
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(x < y && uint64(x) < uint64(y)) {
|
|
goto end88f2277949392f2b8d03934fd812d3ee
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end88f2277949392f2b8d03934fd812d3ee
|
|
end88f2277949392f2b8d03934fd812d3ee:
|
|
;
|
|
// match: (CMPQconst (MOVQconst [x]) [y])
|
|
// cond: x<y && uint64(x)>uint64(y)
|
|
// result: (FlagLT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end38a2207ac4547f3f0cfb2bc48748e033
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(x < y && uint64(x) > uint64(y)) {
|
|
goto end38a2207ac4547f3f0cfb2bc48748e033
|
|
}
|
|
v.Op = OpAMD64FlagLT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end38a2207ac4547f3f0cfb2bc48748e033
|
|
end38a2207ac4547f3f0cfb2bc48748e033:
|
|
;
|
|
// match: (CMPQconst (MOVQconst [x]) [y])
|
|
// cond: x>y && uint64(x)<uint64(y)
|
|
// result: (FlagGT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end0adaa13f82a881b97095d7a210b96f3c
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(x > y && uint64(x) < uint64(y)) {
|
|
goto end0adaa13f82a881b97095d7a210b96f3c
|
|
}
|
|
v.Op = OpAMD64FlagGT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end0adaa13f82a881b97095d7a210b96f3c
|
|
end0adaa13f82a881b97095d7a210b96f3c:
|
|
;
|
|
// match: (CMPQconst (MOVQconst [x]) [y])
|
|
// cond: x>y && uint64(x)>uint64(y)
|
|
// result: (FlagGT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end1248b87e4a141c78bc8eff05d3fac70e
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(x > y && uint64(x) > uint64(y)) {
|
|
goto end1248b87e4a141c78bc8eff05d3fac70e
|
|
}
|
|
v.Op = OpAMD64FlagGT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end1248b87e4a141c78bc8eff05d3fac70e
|
|
end1248b87e4a141c78bc8eff05d3fac70e:
|
|
;
|
|
// match: (CMPQconst (ANDQconst _ [m]) [n])
|
|
// cond: m+1==n && isPowerOfTwo(n)
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64ANDQconst {
|
|
goto end934098fb12e383829b654938269abc12
|
|
}
|
|
m := v.Args[0].AuxInt
|
|
n := v.AuxInt
|
|
if !(m+1 == n && isPowerOfTwo(n)) {
|
|
goto end934098fb12e383829b654938269abc12
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end934098fb12e383829b654938269abc12
|
|
end934098fb12e383829b654938269abc12:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (CMPWconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end310a9ba58ac35c97587e08c63fe8a46c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64CMPWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end310a9ba58ac35c97587e08c63fe8a46c
|
|
end310a9ba58ac35c97587e08c63fe8a46c:
|
|
;
|
|
// match: (CMPW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (InvertFlags (CMPWconst x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end3c52d0ae6e3d186bf131b41276c21889
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64InvertFlags
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end3c52d0ae6e3d186bf131b41276c21889
|
|
end3c52d0ae6e3d186bf131b41276c21889:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64CMPWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (CMPWconst (MOVWconst [x]) [y])
|
|
// cond: int16(x)==int16(y)
|
|
// result: (FlagEQ)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto endff7e81d2095a9997513cae77cd245b43
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int16(x) == int16(y)) {
|
|
goto endff7e81d2095a9997513cae77cd245b43
|
|
}
|
|
v.Op = OpAMD64FlagEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endff7e81d2095a9997513cae77cd245b43
|
|
endff7e81d2095a9997513cae77cd245b43:
|
|
;
|
|
// match: (CMPWconst (MOVWconst [x]) [y])
|
|
// cond: int16(x)<int16(y) && uint16(x)<uint16(y)
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end13137b0dee5a1ef5d508b312e4fa947c
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int16(x) < int16(y) && uint16(x) < uint16(y)) {
|
|
goto end13137b0dee5a1ef5d508b312e4fa947c
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end13137b0dee5a1ef5d508b312e4fa947c
|
|
end13137b0dee5a1ef5d508b312e4fa947c:
|
|
;
|
|
// match: (CMPWconst (MOVWconst [x]) [y])
|
|
// cond: int16(x)<int16(y) && uint16(x)>uint16(y)
|
|
// result: (FlagLT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto ended901a2a49e592c431e45ffc17ca213d
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int16(x) < int16(y) && uint16(x) > uint16(y)) {
|
|
goto ended901a2a49e592c431e45ffc17ca213d
|
|
}
|
|
v.Op = OpAMD64FlagLT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto ended901a2a49e592c431e45ffc17ca213d
|
|
ended901a2a49e592c431e45ffc17ca213d:
|
|
;
|
|
// match: (CMPWconst (MOVWconst [x]) [y])
|
|
// cond: int16(x)>int16(y) && uint16(x)<uint16(y)
|
|
// result: (FlagGT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end66b1d55596a00cdc04ad83bfdeb6be8b
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int16(x) > int16(y) && uint16(x) < uint16(y)) {
|
|
goto end66b1d55596a00cdc04ad83bfdeb6be8b
|
|
}
|
|
v.Op = OpAMD64FlagGT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end66b1d55596a00cdc04ad83bfdeb6be8b
|
|
end66b1d55596a00cdc04ad83bfdeb6be8b:
|
|
;
|
|
// match: (CMPWconst (MOVWconst [x]) [y])
|
|
// cond: int16(x)>int16(y) && uint16(x)>uint16(y)
|
|
// result: (FlagGT_UGT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end4493f5af38d242ebb4bc2f64055a0854
|
|
}
|
|
x := v.Args[0].AuxInt
|
|
y := v.AuxInt
|
|
if !(int16(x) > int16(y) && uint16(x) > uint16(y)) {
|
|
goto end4493f5af38d242ebb4bc2f64055a0854
|
|
}
|
|
v.Op = OpAMD64FlagGT_UGT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end4493f5af38d242ebb4bc2f64055a0854
|
|
end4493f5af38d242ebb4bc2f64055a0854:
|
|
;
|
|
// match: (CMPWconst (ANDWconst _ [m]) [n])
|
|
// cond: int16(m)+1==int16(n) && isPowerOfTwo(int64(int16(n)))
|
|
// result: (FlagLT_ULT)
|
|
{
|
|
if v.Args[0].Op != OpAMD64ANDWconst {
|
|
goto endfcea07d93ded49b0e02d5fa0059309a4
|
|
}
|
|
m := v.Args[0].AuxInt
|
|
n := v.AuxInt
|
|
if !(int16(m)+1 == int16(n) && isPowerOfTwo(int64(int16(n)))) {
|
|
goto endfcea07d93ded49b0e02d5fa0059309a4
|
|
}
|
|
v.Op = OpAMD64FlagLT_ULT
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto endfcea07d93ded49b0e02d5fa0059309a4
|
|
endfcea07d93ded49b0e02d5fa0059309a4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpClosureCall(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ClosureCall [argwid] entry closure mem)
|
|
// cond:
|
|
// result: (CALLclosure [argwid] entry closure mem)
|
|
{
|
|
argwid := v.AuxInt
|
|
entry := v.Args[0]
|
|
closure := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64CALLclosure
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = argwid
|
|
v.AddArg(entry)
|
|
v.AddArg(closure)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endfd75d26316012d86cb71d0dd1214259b
|
|
endfd75d26316012d86cb71d0dd1214259b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCom16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Com16 x)
|
|
// cond:
|
|
// result: (NOTW x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NOTW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1b14ba8d7d7aa585ec0a211827f280ae
|
|
end1b14ba8d7d7aa585ec0a211827f280ae:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCom32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Com32 x)
|
|
// cond:
|
|
// result: (NOTL x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NOTL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end6eb124ba3bdb3fd6031414370852feb6
|
|
end6eb124ba3bdb3fd6031414370852feb6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCom64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Com64 x)
|
|
// cond:
|
|
// result: (NOTQ x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NOTQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endf5f3b355a87779c347e305719dddda05
|
|
endf5f3b355a87779c347e305719dddda05:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCom8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Com8 x)
|
|
// cond:
|
|
// result: (NOTB x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NOTB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1c7c5c055d663ccf1f05fbc4883030c6
|
|
end1c7c5c055d663ccf1f05fbc4883030c6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConst16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Const16 [val])
|
|
// cond:
|
|
// result: (MOVWconst [val])
|
|
{
|
|
val := v.AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = val
|
|
return true
|
|
}
|
|
goto end2c6c92f297873b8ac12bd035d56d001e
|
|
end2c6c92f297873b8ac12bd035d56d001e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConst32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Const32 [val])
|
|
// cond:
|
|
// result: (MOVLconst [val])
|
|
{
|
|
val := v.AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = val
|
|
return true
|
|
}
|
|
goto enddae5807662af67143a3ac3ad9c63bae5
|
|
enddae5807662af67143a3ac3ad9c63bae5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConst32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Const32F [val])
|
|
// cond:
|
|
// result: (MOVSSconst [val])
|
|
{
|
|
val := v.AuxInt
|
|
v.Op = OpAMD64MOVSSconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = val
|
|
return true
|
|
}
|
|
goto endfabcef2d57a8f36eaa6041de6f112b89
|
|
endfabcef2d57a8f36eaa6041de6f112b89:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConst64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Const64 [val])
|
|
// cond:
|
|
// result: (MOVQconst [val])
|
|
{
|
|
val := v.AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = val
|
|
return true
|
|
}
|
|
goto endc630434ae7f143ab69d5f482a9b52b5f
|
|
endc630434ae7f143ab69d5f482a9b52b5f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConst64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Const64F [val])
|
|
// cond:
|
|
// result: (MOVSDconst [val])
|
|
{
|
|
val := v.AuxInt
|
|
v.Op = OpAMD64MOVSDconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = val
|
|
return true
|
|
}
|
|
goto endae6cf7189e464bbde17b98635a20f0ff
|
|
endae6cf7189e464bbde17b98635a20f0ff:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConst8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Const8 [val])
|
|
// cond:
|
|
// result: (MOVBconst [val])
|
|
{
|
|
val := v.AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = val
|
|
return true
|
|
}
|
|
goto end200524c722ed14ca935ba47f8f30327d
|
|
end200524c722ed14ca935ba47f8f30327d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConstBool(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ConstBool [b])
|
|
// cond:
|
|
// result: (MOVBconst [b])
|
|
{
|
|
b := v.AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = b
|
|
return true
|
|
}
|
|
goto end6d919011283330dcbcb3826f0adc6793
|
|
end6d919011283330dcbcb3826f0adc6793:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConstNil(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ConstNil)
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endea557d921056c25b945a49649e4b9b91
|
|
endea557d921056c25b945a49649e4b9b91:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpConvert(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Convert <t> x mem)
|
|
// cond:
|
|
// result: (MOVQconvert <t> x mem)
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVQconvert
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end0aa5cd28888761ffab21bce45db361c8
|
|
end0aa5cd28888761ffab21bce45db361c8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt32Fto32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt32Fto32 x)
|
|
// cond:
|
|
// result: (CVTTSS2SL x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTTSS2SL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda410209d31804e1bce7bdc235fc62342
|
|
enda410209d31804e1bce7bdc235fc62342:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt32Fto64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt32Fto64 x)
|
|
// cond:
|
|
// result: (CVTTSS2SQ x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTTSS2SQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enddb02fa4f3230a14d557d6c90cdadd523
|
|
enddb02fa4f3230a14d557d6c90cdadd523:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt32Fto64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt32Fto64F x)
|
|
// cond:
|
|
// result: (CVTSS2SD x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTSS2SD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0bf5d6f8d182ee2b3ab7d7c2f8ff7790
|
|
end0bf5d6f8d182ee2b3ab7d7c2f8ff7790:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt32to32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt32to32F x)
|
|
// cond:
|
|
// result: (CVTSL2SS x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTSL2SS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto ende0bdea2b21aecdb8399d6fd80ddc97d6
|
|
ende0bdea2b21aecdb8399d6fd80ddc97d6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt32to64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt32to64F x)
|
|
// cond:
|
|
// result: (CVTSL2SD x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTSL2SD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto ende06cbe745112bcf0e6612788ef71c958
|
|
ende06cbe745112bcf0e6612788ef71c958:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt64Fto32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt64Fto32 x)
|
|
// cond:
|
|
// result: (CVTTSD2SL x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTTSD2SL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endc213dd690dfe568607dec717b2c385b7
|
|
endc213dd690dfe568607dec717b2c385b7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt64Fto32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt64Fto32F x)
|
|
// cond:
|
|
// result: (CVTSD2SS x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTSD2SS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endfd70158a96824ced99712d606c607d94
|
|
endfd70158a96824ced99712d606c607d94:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt64Fto64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt64Fto64 x)
|
|
// cond:
|
|
// result: (CVTTSD2SQ x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTTSD2SQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0bf3e4468047fd20714266ff05797454
|
|
end0bf3e4468047fd20714266ff05797454:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt64to32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt64to32F x)
|
|
// cond:
|
|
// result: (CVTSQ2SS x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTSQ2SS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endfecc08b8a8cbd2bf3be21a077c4d0d40
|
|
endfecc08b8a8cbd2bf3be21a077c4d0d40:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpCvt64to64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Cvt64to64F x)
|
|
// cond:
|
|
// result: (CVTSQ2SD x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64CVTSQ2SD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endf74ce5df659f385f75c61187b515a5d0
|
|
endf74ce5df659f385f75c61187b515a5d0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDeferCall(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (DeferCall [argwid] mem)
|
|
// cond:
|
|
// result: (CALLdefer [argwid] mem)
|
|
{
|
|
argwid := v.AuxInt
|
|
mem := v.Args[0]
|
|
v.Op = OpAMD64CALLdefer
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = argwid
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end1c408581037450df959dd1fb7554a022
|
|
end1c408581037450df959dd1fb7554a022:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div16 x y)
|
|
// cond:
|
|
// result: (DIVW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endb60a86e606726640c84d3e1e5a5ce890
|
|
endb60a86e606726640c84d3e1e5a5ce890:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv16u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div16u x y)
|
|
// cond:
|
|
// result: (DIVWU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVWU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end6af9e212a865593e506bfdf7db67c9ec
|
|
end6af9e212a865593e506bfdf7db67c9ec:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div32 x y)
|
|
// cond:
|
|
// result: (DIVL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endf20ac71407e57c2904684d3cc33cf697
|
|
endf20ac71407e57c2904684d3cc33cf697:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div32F x y)
|
|
// cond:
|
|
// result: (DIVSS x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVSS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto enddca0462c7b176c4138854d7d5627ab5b
|
|
enddca0462c7b176c4138854d7d5627ab5b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv32u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div32u x y)
|
|
// cond:
|
|
// result: (DIVLU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVLU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto enda22604d23eeb1298008c97b817f60bbd
|
|
enda22604d23eeb1298008c97b817f60bbd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div64 x y)
|
|
// cond:
|
|
// result: (DIVQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end86490d9b337333dfc09a413e1e0120a9
|
|
end86490d9b337333dfc09a413e1e0120a9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div64F x y)
|
|
// cond:
|
|
// result: (DIVSD x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVSD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end12299d76db5144a60f564d34ba97eb43
|
|
end12299d76db5144a60f564d34ba97eb43:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv64u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div64u x y)
|
|
// cond:
|
|
// result: (DIVQU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVQU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endf871d8b397e5fad6a5b500cc0c759a8d
|
|
endf871d8b397e5fad6a5b500cc0c759a8d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div8 x y)
|
|
// cond:
|
|
// result: (DIVW (SignExt8to16 x) (SignExt8to16 y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.Type = config.fe.TypeInt16()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
|
|
v1.AddArg(y)
|
|
v1.Type = config.fe.TypeInt16()
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endeee2bc780a73ec2ccb1a66c527816ee0
|
|
endeee2bc780a73ec2ccb1a66c527816ee0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpDiv8u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Div8u x y)
|
|
// cond:
|
|
// result: (DIVWU (ZeroExt8to16 x) (ZeroExt8to16 y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64DIVWU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.Type = config.fe.TypeUInt16()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
|
|
v1.AddArg(y)
|
|
v1.Type = config.fe.TypeUInt16()
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end39da6664d6434d844303f6924cc875dd
|
|
end39da6664d6434d844303f6924cc875dd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEq16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Eq16 x y)
|
|
// cond:
|
|
// result: (SETEQ (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endd7f668b1d23603b0949953ee8dec8107
|
|
endd7f668b1d23603b0949953ee8dec8107:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEq32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Eq32 x y)
|
|
// cond:
|
|
// result: (SETEQ (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endf28041ae0c73fb341cc0d2f4903fb2fb
|
|
endf28041ae0c73fb341cc0d2f4903fb2fb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEq32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Eq32F x y)
|
|
// cond:
|
|
// result: (SETEQF (UCOMISS x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb2c12933769e5faa8fc238048e113dee
|
|
endb2c12933769e5faa8fc238048e113dee:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEq64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Eq64 x y)
|
|
// cond:
|
|
// result: (SETEQ (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto ende07a380487b710b51bcd5aa6d3144b8c
|
|
ende07a380487b710b51bcd5aa6d3144b8c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEq64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Eq64F x y)
|
|
// cond:
|
|
// result: (SETEQF (UCOMISD x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end68e20c0c1b3ee62fbd17af07ac100704
|
|
end68e20c0c1b3ee62fbd17af07ac100704:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEq8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Eq8 x y)
|
|
// cond:
|
|
// result: (SETEQ (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end359e5a51d2ab928a455f0ae5adb42ab0
|
|
end359e5a51d2ab928a455f0ae5adb42ab0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpEqPtr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (EqPtr x y)
|
|
// cond:
|
|
// result: (SETEQ (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endf19bd3c0eb99d15718bef4066d62560c
|
|
endf19bd3c0eb99d15718bef4066d62560c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq16 x y)
|
|
// cond:
|
|
// result: (SETGE (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end0a3f723d5c0b877c473b0043d814867b
|
|
end0a3f723d5c0b877c473b0043d814867b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq16U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq16U x y)
|
|
// cond:
|
|
// result: (SETAE (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETAE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end79d754a28ee34eff95140635b26f0248
|
|
end79d754a28ee34eff95140635b26f0248:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq32 x y)
|
|
// cond:
|
|
// result: (SETGE (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endfb1f6286a1b153b2a3f5b8548a782c8c
|
|
endfb1f6286a1b153b2a3f5b8548a782c8c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq32F x y)
|
|
// cond:
|
|
// result: (SETGEF (UCOMISS x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGEF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end7a8d6107a945410e64db06669a61da97
|
|
end7a8d6107a945410e64db06669a61da97:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq32U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq32U x y)
|
|
// cond:
|
|
// result: (SETAE (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETAE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endc5d3478a626df01ede063564f4cb80d0
|
|
endc5d3478a626df01ede063564f4cb80d0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq64 x y)
|
|
// cond:
|
|
// result: (SETGE (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end74bddb7905ab865de5b041e7e4789911
|
|
end74bddb7905ab865de5b041e7e4789911:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq64F x y)
|
|
// cond:
|
|
// result: (SETGEF (UCOMISD x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGEF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end9fac9bd98ef58b7fbbe1a31f84bdcccf
|
|
end9fac9bd98ef58b7fbbe1a31f84bdcccf:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq64U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq64U x y)
|
|
// cond:
|
|
// result: (SETAE (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETAE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end95101721fc8f5be9969e50e364143e7f
|
|
end95101721fc8f5be9969e50e364143e7f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq8 x y)
|
|
// cond:
|
|
// result: (SETGE (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end983070a3db317bdb64b5a0fb104d267c
|
|
end983070a3db317bdb64b5a0fb104d267c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGeq8U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Geq8U x y)
|
|
// cond:
|
|
// result: (SETAE (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETAE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto enda617119faaccc0f0c2d23548116cf331
|
|
enda617119faaccc0f0c2d23548116cf331:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGetClosurePtr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (GetClosurePtr)
|
|
// cond:
|
|
// result: (LoweredGetClosurePtr)
|
|
{
|
|
v.Op = OpAMD64LoweredGetClosurePtr
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
return true
|
|
}
|
|
goto end6fd0b53f0acb4d35e7d7fa78d2ca1392
|
|
end6fd0b53f0acb4d35e7d7fa78d2ca1392:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGetG(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (GetG mem)
|
|
// cond:
|
|
// result: (LoweredGetG mem)
|
|
{
|
|
mem := v.Args[0]
|
|
v.Op = OpAMD64LoweredGetG
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endf543eaaf68c4bef1d4cdc8ba19683723
|
|
endf543eaaf68c4bef1d4cdc8ba19683723:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGoCall(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (GoCall [argwid] mem)
|
|
// cond:
|
|
// result: (CALLgo [argwid] mem)
|
|
{
|
|
argwid := v.AuxInt
|
|
mem := v.Args[0]
|
|
v.Op = OpAMD64CALLgo
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = argwid
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end1cef0f92c46e6aaa2c7abdf5f2794baf
|
|
end1cef0f92c46e6aaa2c7abdf5f2794baf:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater16 x y)
|
|
// cond:
|
|
// result: (SETG (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETG
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end4e4a1307c61240af9a86d8fe4f834ee8
|
|
end4e4a1307c61240af9a86d8fe4f834ee8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater16U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater16U x y)
|
|
// cond:
|
|
// result: (SETA (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETA
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end7c66c75f4b8ec1db593f3e60cfba9592
|
|
end7c66c75f4b8ec1db593f3e60cfba9592:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater32 x y)
|
|
// cond:
|
|
// result: (SETG (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETG
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end6fb0eae4a0e0e81b4afb085d398d873b
|
|
end6fb0eae4a0e0e81b4afb085d398d873b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater32F x y)
|
|
// cond:
|
|
// result: (SETGF (UCOMISS x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end94df0bd5cedad8ce8021df1b24da40c6
|
|
end94df0bd5cedad8ce8021df1b24da40c6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater32U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater32U x y)
|
|
// cond:
|
|
// result: (SETA (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETA
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end18da022a28eae8bd0771e0c948aadaf8
|
|
end18da022a28eae8bd0771e0c948aadaf8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater64 x y)
|
|
// cond:
|
|
// result: (SETG (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETG
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endc025c908708f939780fba0da0c1148b4
|
|
endc025c908708f939780fba0da0c1148b4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater64F x y)
|
|
// cond:
|
|
// result: (SETGF (UCOMISD x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end033ca5181b18376e7215c02812ef5a6b
|
|
end033ca5181b18376e7215c02812ef5a6b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater64U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater64U x y)
|
|
// cond:
|
|
// result: (SETA (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETA
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb3e25347041760a04d3fc8321c3f3d00
|
|
endb3e25347041760a04d3fc8321c3f3d00:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater8 x y)
|
|
// cond:
|
|
// result: (SETG (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETG
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto enda3eeb5da2e69cb54a1515601d4b360d4
|
|
enda3eeb5da2e69cb54a1515601d4b360d4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpGreater8U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Greater8U x y)
|
|
// cond:
|
|
// result: (SETA (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETA
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endd2027f3b6471262f42b90c8cc0413667
|
|
endd2027f3b6471262f42b90c8cc0413667:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpHmul16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Hmul16 x y)
|
|
// cond:
|
|
// result: (HMULW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64HMULW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end1b9ff394bb3b06fc109637656b6875f5
|
|
end1b9ff394bb3b06fc109637656b6875f5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpHmul16u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Hmul16u x y)
|
|
// cond:
|
|
// result: (HMULWU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64HMULWU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endee9089e794a43f2ce1619a6ef61670f4
|
|
endee9089e794a43f2ce1619a6ef61670f4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpHmul32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Hmul32 x y)
|
|
// cond:
|
|
// result: (HMULL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64HMULL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end7c83c91ef2634f0b1da4f49350b437b1
|
|
end7c83c91ef2634f0b1da4f49350b437b1:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpHmul32u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Hmul32u x y)
|
|
// cond:
|
|
// result: (HMULLU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64HMULLU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end3c4f36611dc8815aa2a63d4ec0eaa06d
|
|
end3c4f36611dc8815aa2a63d4ec0eaa06d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpHmul8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Hmul8 x y)
|
|
// cond:
|
|
// result: (HMULB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64HMULB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end51b2cc9f1ed15314e68fc81024f281a7
|
|
end51b2cc9f1ed15314e68fc81024f281a7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpHmul8u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Hmul8u x y)
|
|
// cond:
|
|
// result: (HMULBU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64HMULBU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto ende68d7b3a3c774cedc3522af9d635c39d
|
|
ende68d7b3a3c774cedc3522af9d635c39d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpITab(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ITab (Load ptr mem))
|
|
// cond:
|
|
// result: (MOVQload ptr mem)
|
|
{
|
|
if v.Args[0].Op != OpLoad {
|
|
goto enda49fcae3630a097c78aa58189c90a97a
|
|
}
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[0].Args[1]
|
|
v.Op = OpAMD64MOVQload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto enda49fcae3630a097c78aa58189c90a97a
|
|
enda49fcae3630a097c78aa58189c90a97a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpInterCall(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (InterCall [argwid] entry mem)
|
|
// cond:
|
|
// result: (CALLinter [argwid] entry mem)
|
|
{
|
|
argwid := v.AuxInt
|
|
entry := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64CALLinter
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = argwid
|
|
v.AddArg(entry)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endc04351e492ed362efc6aa75121bca305
|
|
endc04351e492ed362efc6aa75121bca305:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpIsInBounds(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (IsInBounds idx len)
|
|
// cond:
|
|
// result: (SETB (CMPQ idx len))
|
|
{
|
|
idx := v.Args[0]
|
|
len := v.Args[1]
|
|
v.Op = OpAMD64SETB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(idx)
|
|
v0.AddArg(len)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endfff988d5f1912886d73be3bb563c37d9
|
|
endfff988d5f1912886d73be3bb563c37d9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpIsNonNil(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (IsNonNil p)
|
|
// cond:
|
|
// result: (SETNE (TESTQ p p))
|
|
{
|
|
p := v.Args[0]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64TESTQ, TypeInvalid)
|
|
v0.AddArg(p)
|
|
v0.AddArg(p)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end0af5ec868ede9ea73fb0602d54b863e9
|
|
end0af5ec868ede9ea73fb0602d54b863e9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpIsSliceInBounds(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (IsSliceInBounds idx len)
|
|
// cond:
|
|
// result: (SETBE (CMPQ idx len))
|
|
{
|
|
idx := v.Args[0]
|
|
len := v.Args[1]
|
|
v.Op = OpAMD64SETBE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(idx)
|
|
v0.AddArg(len)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end02799ad95fe7fb5ce3c2c8ab313b737c
|
|
end02799ad95fe7fb5ce3c2c8ab313b737c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq16 x y)
|
|
// cond:
|
|
// result: (SETLE (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETLE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end586c647ca6bb8ec725eea917c743d1ea
|
|
end586c647ca6bb8ec725eea917c743d1ea:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq16U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq16U x y)
|
|
// cond:
|
|
// result: (SETBE (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETBE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end9c24a81bc6a4a92267bd6638362dfbfc
|
|
end9c24a81bc6a4a92267bd6638362dfbfc:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq32 x y)
|
|
// cond:
|
|
// result: (SETLE (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETLE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end595ee99a9fc3460b2748b9129b139f88
|
|
end595ee99a9fc3460b2748b9129b139f88:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq32F x y)
|
|
// cond:
|
|
// result: (SETGEF (UCOMISS y x))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGEF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
|
|
v0.AddArg(y)
|
|
v0.AddArg(x)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endfee4b989a80cc43328b24f7017e80a17
|
|
endfee4b989a80cc43328b24f7017e80a17:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq32U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq32U x y)
|
|
// cond:
|
|
// result: (SETBE (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETBE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end1a59850aad6cb17c295d0dc359013420
|
|
end1a59850aad6cb17c295d0dc359013420:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq64 x y)
|
|
// cond:
|
|
// result: (SETLE (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETLE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end406def83fcbf29cd8fa306170b512de2
|
|
end406def83fcbf29cd8fa306170b512de2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq64F x y)
|
|
// cond:
|
|
// result: (SETGEF (UCOMISD y x))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGEF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
|
|
v0.AddArg(y)
|
|
v0.AddArg(x)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end6e3de6d4b5668f673e3822d5947edbd0
|
|
end6e3de6d4b5668f673e3822d5947edbd0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq64U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq64U x y)
|
|
// cond:
|
|
// result: (SETBE (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETBE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end52f23c145b80639c8d60420ad4057bc7
|
|
end52f23c145b80639c8d60420ad4057bc7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq8 x y)
|
|
// cond:
|
|
// result: (SETLE (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETLE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end72ecba6f2a7062cb266923dfec811f79
|
|
end72ecba6f2a7062cb266923dfec811f79:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLeq8U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Leq8U x y)
|
|
// cond:
|
|
// result: (SETBE (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETBE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb043b338cced4f15400d8d6e584ebea7
|
|
endb043b338cced4f15400d8d6e584ebea7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less16 x y)
|
|
// cond:
|
|
// result: (SETL (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end2f6c6ba80eda8d68e77a58cba13d3f16
|
|
end2f6c6ba80eda8d68e77a58cba13d3f16:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess16U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less16U x y)
|
|
// cond:
|
|
// result: (SETB (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end9f65eefe7b83a3c436b5c16664c93703
|
|
end9f65eefe7b83a3c436b5c16664c93703:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less32 x y)
|
|
// cond:
|
|
// result: (SETL (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end6632ff4ee994eb5b14cdf60c99ac3798
|
|
end6632ff4ee994eb5b14cdf60c99ac3798:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less32F x y)
|
|
// cond:
|
|
// result: (SETGF (UCOMISS y x))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
|
|
v0.AddArg(y)
|
|
v0.AddArg(x)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end5b3b0c96a7fc2ede81bc89c9abaac9d0
|
|
end5b3b0c96a7fc2ede81bc89c9abaac9d0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess32U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less32U x y)
|
|
// cond:
|
|
// result: (SETB (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end39e5a513c7fb0a42817a6cf9c6143b60
|
|
end39e5a513c7fb0a42817a6cf9c6143b60:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less64 x y)
|
|
// cond:
|
|
// result: (SETL (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto enddce827d3e922e8487b61a88c2b1510f2
|
|
enddce827d3e922e8487b61a88c2b1510f2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less64F x y)
|
|
// cond:
|
|
// result: (SETGF (UCOMISD y x))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETGF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
|
|
v0.AddArg(y)
|
|
v0.AddArg(x)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endf2be3d2dcb6543d2159e7fff5ccbbb55
|
|
endf2be3d2dcb6543d2159e7fff5ccbbb55:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess64U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less64U x y)
|
|
// cond:
|
|
// result: (SETB (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb76d7768f175a44baf6d63d12ab6e81d
|
|
endb76d7768f175a44baf6d63d12ab6e81d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less8 x y)
|
|
// cond:
|
|
// result: (SETL (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end314fbffe99f3bd4b07857a80c0b914cd
|
|
end314fbffe99f3bd4b07857a80c0b914cd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLess8U(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Less8U x y)
|
|
// cond:
|
|
// result: (SETB (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endadccc5d80fd053a33004ed0759f64d93
|
|
endadccc5d80fd053a33004ed0759f64d93:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLoad(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Load <t> ptr mem)
|
|
// cond: (is64BitInt(t) || isPtr(t))
|
|
// result: (MOVQload ptr mem)
|
|
{
|
|
t := v.Type
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(is64BitInt(t) || isPtr(t)) {
|
|
goto end7c4c53acf57ebc5f03273652ba1d5934
|
|
}
|
|
v.Op = OpAMD64MOVQload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end7c4c53acf57ebc5f03273652ba1d5934
|
|
end7c4c53acf57ebc5f03273652ba1d5934:
|
|
;
|
|
// match: (Load <t> ptr mem)
|
|
// cond: is32BitInt(t)
|
|
// result: (MOVLload ptr mem)
|
|
{
|
|
t := v.Type
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(is32BitInt(t)) {
|
|
goto ende1cfcb15bfbcfd448ce303d0882a4057
|
|
}
|
|
v.Op = OpAMD64MOVLload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto ende1cfcb15bfbcfd448ce303d0882a4057
|
|
ende1cfcb15bfbcfd448ce303d0882a4057:
|
|
;
|
|
// match: (Load <t> ptr mem)
|
|
// cond: is16BitInt(t)
|
|
// result: (MOVWload ptr mem)
|
|
{
|
|
t := v.Type
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(is16BitInt(t)) {
|
|
goto end2d0a1304501ed9f4e9e2d288505a9c7c
|
|
}
|
|
v.Op = OpAMD64MOVWload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end2d0a1304501ed9f4e9e2d288505a9c7c
|
|
end2d0a1304501ed9f4e9e2d288505a9c7c:
|
|
;
|
|
// match: (Load <t> ptr mem)
|
|
// cond: (t.IsBoolean() || is8BitInt(t))
|
|
// result: (MOVBload ptr mem)
|
|
{
|
|
t := v.Type
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(t.IsBoolean() || is8BitInt(t)) {
|
|
goto end8f83bf72293670e75b22d6627bd13f0b
|
|
}
|
|
v.Op = OpAMD64MOVBload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end8f83bf72293670e75b22d6627bd13f0b
|
|
end8f83bf72293670e75b22d6627bd13f0b:
|
|
;
|
|
// match: (Load <t> ptr mem)
|
|
// cond: is32BitFloat(t)
|
|
// result: (MOVSSload ptr mem)
|
|
{
|
|
t := v.Type
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(is32BitFloat(t)) {
|
|
goto end63383c4895805881aabceebea3c4c533
|
|
}
|
|
v.Op = OpAMD64MOVSSload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end63383c4895805881aabceebea3c4c533
|
|
end63383c4895805881aabceebea3c4c533:
|
|
;
|
|
// match: (Load <t> ptr mem)
|
|
// cond: is64BitFloat(t)
|
|
// result: (MOVSDload ptr mem)
|
|
{
|
|
t := v.Type
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(is64BitFloat(t)) {
|
|
goto end99d0858c0a5bb72f0fe4decc748da812
|
|
}
|
|
v.Op = OpAMD64MOVSDload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end99d0858c0a5bb72f0fe4decc748da812
|
|
end99d0858c0a5bb72f0fe4decc748da812:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLrot16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lrot16 <t> x [c])
|
|
// cond:
|
|
// result: (ROLWconst <t> [c&15] x)
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
c := v.AuxInt
|
|
v.Op = OpAMD64ROLWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AuxInt = c & 15
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endb23dfa24c619d0068f925899d53ee7fd
|
|
endb23dfa24c619d0068f925899d53ee7fd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLrot32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lrot32 <t> x [c])
|
|
// cond:
|
|
// result: (ROLLconst <t> [c&31] x)
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
c := v.AuxInt
|
|
v.Op = OpAMD64ROLLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end38b2215c011896c36845f72ecb72b1b0
|
|
end38b2215c011896c36845f72ecb72b1b0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLrot64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lrot64 <t> x [c])
|
|
// cond:
|
|
// result: (ROLQconst <t> [c&63] x)
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
c := v.AuxInt
|
|
v.Op = OpAMD64ROLQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AuxInt = c & 63
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end5cb355e4f3ca387f252ef4f6a55f9f68
|
|
end5cb355e4f3ca387f252ef4f6a55f9f68:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLrot8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lrot8 <t> x [c])
|
|
// cond:
|
|
// result: (ROLBconst <t> [c&7] x)
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
c := v.AuxInt
|
|
v.Op = OpAMD64ROLBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AuxInt = c & 7
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end26bfb3dd5b537cf13ac9f2978d94ed71
|
|
end26bfb3dd5b537cf13ac9f2978d94ed71:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh16x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh16x16 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPWconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto ende1a6e1781dd669bd74d66fc34c97218f
|
|
ende1a6e1781dd669bd74d66fc34c97218f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh16x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh16x32 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPLconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end711e661a5b6682f98e7993c2dfa72f45
|
|
end711e661a5b6682f98e7993c2dfa72f45:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh16x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh16x64 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPQconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end4800d2b7d4f0e5acafcdf4e765941570
|
|
end4800d2b7d4f0e5acafcdf4e765941570:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh16x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh16x8 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHLW <t> x y) (SBBLcarrymask <t> (CMPBconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endbe15f4a70f6c490f30f12a5db0f24ec4
|
|
endbe15f4a70f6c490f30f12a5db0f24ec4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh32x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh32x16 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end6e9dfb6e850fc86393b2f6b1d509287f
|
|
end6e9dfb6e850fc86393b2f6b1d509287f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh32x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh32x32 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end9a4d057653a8fdad133aaf4a6b4f2b74
|
|
end9a4d057653a8fdad133aaf4a6b4f2b74:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh32x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh32x64 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPQconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endae1486be93eb21ebac539419b5a109cb
|
|
endae1486be93eb21ebac539419b5a109cb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh32x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh32x8 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHLL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endede3d7bbbb6e7ac26b598b75409703f5
|
|
endede3d7bbbb6e7ac26b598b75409703f5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh64x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh64x16 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPWconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end4dc49d47e1079e618e480ee95c20df6d
|
|
end4dc49d47e1079e618e480ee95c20df6d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh64x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh64x32 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPLconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end52a5e8c44a38fe265cf0619081d1723b
|
|
end52a5e8c44a38fe265cf0619081d1723b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh64x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh64x64 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPQconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto enda2931f1f1a64c3e0251febeb894666b0
|
|
enda2931f1f1a64c3e0251febeb894666b0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh64x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh64x8 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHLQ <t> x y) (SBBQcarrymask <t> (CMPBconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end8535fcd7c1fc28bbc53844b29ffbdb22
|
|
end8535fcd7c1fc28bbc53844b29ffbdb22:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh8x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh8x16 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPWconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endc4b0328ed4d6943ac1af3662b93ad8e2
|
|
endc4b0328ed4d6943ac1af3662b93ad8e2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh8x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh8x32 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPLconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end1e6cfcdb7439ccc73f4f59874f3559b2
|
|
end1e6cfcdb7439ccc73f4f59874f3559b2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh8x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh8x64 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPQconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endf3ea2e740c7fd7ea2caa24357b0bf798
|
|
endf3ea2e740c7fd7ea2caa24357b0bf798:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpLsh8x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Lsh8x8 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHLB <t> x y) (SBBLcarrymask <t> (CMPBconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHLB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end5d557e41670b7ac83d122eeb4029363d
|
|
end5d557e41670b7ac83d122eeb4029363d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVBQSX(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVBQSX (MOVBload [off] {sym} ptr mem))
|
|
// cond:
|
|
// result: @v.Args[0].Block (MOVBQSXload <v.Type> [off] {sym} ptr mem)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBload {
|
|
goto end19c38f3a1a37dca50637c917fa26e4f7
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
sym := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[0].Args[1]
|
|
v0 := v.Args[0].Block.NewValue0(v.Line, OpAMD64MOVBQSXload, TypeInvalid)
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(v0)
|
|
v0.Type = v.Type
|
|
v0.AuxInt = off
|
|
v0.Aux = sym
|
|
v0.AddArg(ptr)
|
|
v0.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end19c38f3a1a37dca50637c917fa26e4f7
|
|
end19c38f3a1a37dca50637c917fa26e4f7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVBQZX(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVBQZX (MOVBload [off] {sym} ptr mem))
|
|
// cond:
|
|
// result: @v.Args[0].Block (MOVBQZXload <v.Type> [off] {sym} ptr mem)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBload {
|
|
goto end1169bcf3d56fa24321b002eaebd5a62d
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
sym := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[0].Args[1]
|
|
v0 := v.Args[0].Block.NewValue0(v.Line, OpAMD64MOVBQZXload, TypeInvalid)
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(v0)
|
|
v0.Type = v.Type
|
|
v0.AuxInt = off
|
|
v0.Aux = sym
|
|
v0.AddArg(ptr)
|
|
v0.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end1169bcf3d56fa24321b002eaebd5a62d
|
|
end1169bcf3d56fa24321b002eaebd5a62d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVBload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVBload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVBload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end7ec9147ab863c1bd59190fed81f894b6
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVBload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end7ec9147ab863c1bd59190fed81f894b6
|
|
end7ec9147ab863c1bd59190fed81f894b6:
|
|
;
|
|
// match: (MOVBload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVBload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end3771a59cf66b0df99120d76f4c358fab
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end3771a59cf66b0df99120d76f4c358fab
|
|
}
|
|
v.Op = OpAMD64MOVBload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end3771a59cf66b0df99120d76f4c358fab
|
|
end3771a59cf66b0df99120d76f4c358fab:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVBstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVBstore [off] {sym} ptr (MOVBQSX x) mem)
|
|
// cond:
|
|
// result: (MOVBstore [off] {sym} ptr x mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBQSX {
|
|
goto end5b3f41f0770d566ff1647dea1d4a40e8
|
|
}
|
|
x := v.Args[1].Args[0]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end5b3f41f0770d566ff1647dea1d4a40e8
|
|
end5b3f41f0770d566ff1647dea1d4a40e8:
|
|
;
|
|
// match: (MOVBstore [off] {sym} ptr (MOVBQZX x) mem)
|
|
// cond:
|
|
// result: (MOVBstore [off] {sym} ptr x mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBQZX {
|
|
goto end3a2e55db7e03920700c4875f6a55de3b
|
|
}
|
|
x := v.Args[1].Args[0]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end3a2e55db7e03920700c4875f6a55de3b
|
|
end3a2e55db7e03920700c4875f6a55de3b:
|
|
;
|
|
// match: (MOVBstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVBstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto ende6347ac19d0469ee59d2e7f2e18d1070
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto ende6347ac19d0469ee59d2e7f2e18d1070
|
|
ende6347ac19d0469ee59d2e7f2e18d1070:
|
|
;
|
|
// match: (MOVBstore [off] {sym} ptr (MOVBconst [c]) mem)
|
|
// cond: validOff(off)
|
|
// result: (MOVBstoreconst [makeValAndOff(int64(int8(c)),off)] {sym} ptr mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto endfdf24c49923451a076f1868988b8c9d9
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
mem := v.Args[2]
|
|
if !(validOff(off)) {
|
|
goto endfdf24c49923451a076f1868988b8c9d9
|
|
}
|
|
v.Op = OpAMD64MOVBstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(int64(int8(c)), off)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endfdf24c49923451a076f1868988b8c9d9
|
|
endfdf24c49923451a076f1868988b8c9d9:
|
|
;
|
|
// match: (MOVBstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVBstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto enda7086cf7f6b8cf81972e2c3d4b12f3fc
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto enda7086cf7f6b8cf81972e2c3d4b12f3fc
|
|
}
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto enda7086cf7f6b8cf81972e2c3d4b12f3fc
|
|
enda7086cf7f6b8cf81972e2c3d4b12f3fc:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVBstoreconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVBstoreconst [sc] {s} (ADDQconst [off] ptr) mem)
|
|
// cond: ValAndOff(sc).canAdd(off)
|
|
// result: (MOVBstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
s := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end8d35ca650b7c40bc43984d3f5925a052
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(ValAndOff(sc).canAdd(off)) {
|
|
goto end8d35ca650b7c40bc43984d3f5925a052
|
|
}
|
|
v.Op = OpAMD64MOVBstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = s
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end8d35ca650b7c40bc43984d3f5925a052
|
|
end8d35ca650b7c40bc43984d3f5925a052:
|
|
;
|
|
// match: (MOVBstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)
|
|
// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)
|
|
// result: (MOVBstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end8deb839acf84818dd8fc827c0338f42c
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
|
|
goto end8deb839acf84818dd8fc827c0338f42c
|
|
}
|
|
v.Op = OpAMD64MOVBstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end8deb839acf84818dd8fc827c0338f42c
|
|
end8deb839acf84818dd8fc827c0338f42c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVLload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVLload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVLload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end0c8b8a40360c5c581d92723eca04d340
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVLload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end0c8b8a40360c5c581d92723eca04d340
|
|
end0c8b8a40360c5c581d92723eca04d340:
|
|
;
|
|
// match: (MOVLload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVLload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto enddb9e59335876d8a565c425731438a1b3
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto enddb9e59335876d8a565c425731438a1b3
|
|
}
|
|
v.Op = OpAMD64MOVLload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto enddb9e59335876d8a565c425731438a1b3
|
|
enddb9e59335876d8a565c425731438a1b3:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVLstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVLstore [off] {sym} ptr (MOVLQSX x) mem)
|
|
// cond:
|
|
// result: (MOVLstore [off] {sym} ptr x mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLQSX {
|
|
goto end1fb7b2ae707c76d30927c21f85d77472
|
|
}
|
|
x := v.Args[1].Args[0]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end1fb7b2ae707c76d30927c21f85d77472
|
|
end1fb7b2ae707c76d30927c21f85d77472:
|
|
;
|
|
// match: (MOVLstore [off] {sym} ptr (MOVLQZX x) mem)
|
|
// cond:
|
|
// result: (MOVLstore [off] {sym} ptr x mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLQZX {
|
|
goto end199e8c23a5e7e99728a43d6a83b2c2cf
|
|
}
|
|
x := v.Args[1].Args[0]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end199e8c23a5e7e99728a43d6a83b2c2cf
|
|
end199e8c23a5e7e99728a43d6a83b2c2cf:
|
|
;
|
|
// match: (MOVLstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVLstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end43bffdb8d9c1fc85a95778d4911955f1
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end43bffdb8d9c1fc85a95778d4911955f1
|
|
end43bffdb8d9c1fc85a95778d4911955f1:
|
|
;
|
|
// match: (MOVLstore [off] {sym} ptr (MOVLconst [c]) mem)
|
|
// cond: validOff(off)
|
|
// result: (MOVLstoreconst [makeValAndOff(int64(int32(c)),off)] {sym} ptr mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto enda62a54c45bf42db801af4095d27faccd
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
mem := v.Args[2]
|
|
if !(validOff(off)) {
|
|
goto enda62a54c45bf42db801af4095d27faccd
|
|
}
|
|
v.Op = OpAMD64MOVLstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(int64(int32(c)), off)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto enda62a54c45bf42db801af4095d27faccd
|
|
enda62a54c45bf42db801af4095d27faccd:
|
|
;
|
|
// match: (MOVLstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVLstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endd57b1e4313fc7a3331340a9af00ba116
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto endd57b1e4313fc7a3331340a9af00ba116
|
|
}
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endd57b1e4313fc7a3331340a9af00ba116
|
|
endd57b1e4313fc7a3331340a9af00ba116:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVLstoreconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVLstoreconst [sc] {s} (ADDQconst [off] ptr) mem)
|
|
// cond: ValAndOff(sc).canAdd(off)
|
|
// result: (MOVLstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
s := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end4981598152dd0763f1d735810a7d34e8
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(ValAndOff(sc).canAdd(off)) {
|
|
goto end4981598152dd0763f1d735810a7d34e8
|
|
}
|
|
v.Op = OpAMD64MOVLstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = s
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end4981598152dd0763f1d735810a7d34e8
|
|
end4981598152dd0763f1d735810a7d34e8:
|
|
;
|
|
// match: (MOVLstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)
|
|
// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)
|
|
// result: (MOVLstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endd579250954b5df84a77518b36f739e12
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
|
|
goto endd579250954b5df84a77518b36f739e12
|
|
}
|
|
v.Op = OpAMD64MOVLstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endd579250954b5df84a77518b36f739e12
|
|
endd579250954b5df84a77518b36f739e12:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVOload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVOload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVOload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endf1e8fcf569ddd8b3f7a2f61696971913
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVOload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endf1e8fcf569ddd8b3f7a2f61696971913
|
|
endf1e8fcf569ddd8b3f7a2f61696971913:
|
|
;
|
|
// match: (MOVOload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVOload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endd36cf9b00af7a8f44fb8c60067a8efb2
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto endd36cf9b00af7a8f44fb8c60067a8efb2
|
|
}
|
|
v.Op = OpAMD64MOVOload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endd36cf9b00af7a8f44fb8c60067a8efb2
|
|
endd36cf9b00af7a8f44fb8c60067a8efb2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVOstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVOstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVOstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end2be573aa1bd919e567e6156a4ee36517
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVOstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end2be573aa1bd919e567e6156a4ee36517
|
|
end2be573aa1bd919e567e6156a4ee36517:
|
|
;
|
|
// match: (MOVOstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVOstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endc28b9b3efe9eb235e1586c4555280c20
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto endc28b9b3efe9eb235e1586c4555280c20
|
|
}
|
|
v.Op = OpAMD64MOVOstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endc28b9b3efe9eb235e1586c4555280c20
|
|
endc28b9b3efe9eb235e1586c4555280c20:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVQload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVQload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVQload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end0b8c50dd7faefb7d046f9a27e054df77
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVQload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end0b8c50dd7faefb7d046f9a27e054df77
|
|
end0b8c50dd7faefb7d046f9a27e054df77:
|
|
;
|
|
// match: (MOVQload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVQload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endd0c093adc4f05f2037005734c77d3cc4
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto endd0c093adc4f05f2037005734c77d3cc4
|
|
}
|
|
v.Op = OpAMD64MOVQload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endd0c093adc4f05f2037005734c77d3cc4
|
|
endd0c093adc4f05f2037005734c77d3cc4:
|
|
;
|
|
// match: (MOVQload [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVQloadidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ8 {
|
|
goto end74a50d810fb3945e809f608cd094a59c
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[0].Args[1]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end74a50d810fb3945e809f608cd094a59c
|
|
}
|
|
v.Op = OpAMD64MOVQloadidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end74a50d810fb3945e809f608cd094a59c
|
|
end74a50d810fb3945e809f608cd094a59c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVQloadidx8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVQloadidx8 [off1] {sym} (ADDQconst [off2] ptr) idx mem)
|
|
// cond:
|
|
// result: (MOVQloadidx8 [addOff(off1, off2)] {sym} ptr idx mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endb138bf9b0b33ec824bf0aff619f8bafa
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVQloadidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endb138bf9b0b33ec824bf0aff619f8bafa
|
|
endb138bf9b0b33ec824bf0aff619f8bafa:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVQstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVQstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVQstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end0a110b5e42a4576c32fda50590092848
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVQstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end0a110b5e42a4576c32fda50590092848
|
|
end0a110b5e42a4576c32fda50590092848:
|
|
;
|
|
// match: (MOVQstore [off] {sym} ptr (MOVQconst [c]) mem)
|
|
// cond: validValAndOff(c,off)
|
|
// result: (MOVQstoreconst [makeValAndOff(c,off)] {sym} ptr mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto endda0f4b36e19753762dbd1c6ee05e4c81
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
mem := v.Args[2]
|
|
if !(validValAndOff(c, off)) {
|
|
goto endda0f4b36e19753762dbd1c6ee05e4c81
|
|
}
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(c, off)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endda0f4b36e19753762dbd1c6ee05e4c81
|
|
endda0f4b36e19753762dbd1c6ee05e4c81:
|
|
;
|
|
// match: (MOVQstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVQstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end9a0cfe20b3b0f587e252760907c1b5c0
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end9a0cfe20b3b0f587e252760907c1b5c0
|
|
}
|
|
v.Op = OpAMD64MOVQstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end9a0cfe20b3b0f587e252760907c1b5c0
|
|
end9a0cfe20b3b0f587e252760907c1b5c0:
|
|
;
|
|
// match: (MOVQstore [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVQstoreidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ8 {
|
|
goto end442c322e6719e280b6be1c12858e49d7
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[0].Args[1]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end442c322e6719e280b6be1c12858e49d7
|
|
}
|
|
v.Op = OpAMD64MOVQstoreidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end442c322e6719e280b6be1c12858e49d7
|
|
end442c322e6719e280b6be1c12858e49d7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVQstoreconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVQstoreconst [sc] {s} (ADDQconst [off] ptr) mem)
|
|
// cond: ValAndOff(sc).canAdd(off)
|
|
// result: (MOVQstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
s := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end3694207cd20e8e1cc719e179bdfe0c74
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(ValAndOff(sc).canAdd(off)) {
|
|
goto end3694207cd20e8e1cc719e179bdfe0c74
|
|
}
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = s
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end3694207cd20e8e1cc719e179bdfe0c74
|
|
end3694207cd20e8e1cc719e179bdfe0c74:
|
|
;
|
|
// match: (MOVQstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)
|
|
// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)
|
|
// result: (MOVQstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endf405b27b22dbf76f83abd1b5ad5e53d9
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
|
|
goto endf405b27b22dbf76f83abd1b5ad5e53d9
|
|
}
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endf405b27b22dbf76f83abd1b5ad5e53d9
|
|
endf405b27b22dbf76f83abd1b5ad5e53d9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVQstoreidx8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVQstoreidx8 [off1] {sym} (ADDQconst [off2] ptr) idx val mem)
|
|
// cond:
|
|
// result: (MOVQstoreidx8 [addOff(off1, off2)] {sym} ptr idx val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end50671766fdab364c1edbd2072fb8e525
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[1]
|
|
val := v.Args[2]
|
|
mem := v.Args[3]
|
|
v.Op = OpAMD64MOVQstoreidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end50671766fdab364c1edbd2072fb8e525
|
|
end50671766fdab364c1edbd2072fb8e525:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSDload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSDload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVSDload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end6dad9bf78e7368bb095eb2dfba7e244a
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVSDload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end6dad9bf78e7368bb095eb2dfba7e244a
|
|
end6dad9bf78e7368bb095eb2dfba7e244a:
|
|
;
|
|
// match: (MOVSDload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSDload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end96fa9c439e31050aa91582bc2a9f2c20
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end96fa9c439e31050aa91582bc2a9f2c20
|
|
}
|
|
v.Op = OpAMD64MOVSDload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end96fa9c439e31050aa91582bc2a9f2c20
|
|
end96fa9c439e31050aa91582bc2a9f2c20:
|
|
;
|
|
// match: (MOVSDload [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSDloadidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ8 {
|
|
goto endbcb2ce441824d0e3a4b501018cfa7f60
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[0].Args[1]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto endbcb2ce441824d0e3a4b501018cfa7f60
|
|
}
|
|
v.Op = OpAMD64MOVSDloadidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endbcb2ce441824d0e3a4b501018cfa7f60
|
|
endbcb2ce441824d0e3a4b501018cfa7f60:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSDloadidx8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSDloadidx8 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx mem)
|
|
// cond:
|
|
// result: (MOVSDloadidx8 [addOff(off1, off2)] {sym} ptr idx mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end84f0f457e271104a92343e3b1d2804c6
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
if v.Args[0].Aux != v.Aux {
|
|
goto end84f0f457e271104a92343e3b1d2804c6
|
|
}
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVSDloadidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end84f0f457e271104a92343e3b1d2804c6
|
|
end84f0f457e271104a92343e3b1d2804c6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSDstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSDstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVSDstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end6c6160664143cc66e63e67b9aa43a7ef
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVSDstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end6c6160664143cc66e63e67b9aa43a7ef
|
|
end6c6160664143cc66e63e67b9aa43a7ef:
|
|
;
|
|
// match: (MOVSDstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSDstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end415dde14f3400bec1b2756174a5d7179
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end415dde14f3400bec1b2756174a5d7179
|
|
}
|
|
v.Op = OpAMD64MOVSDstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end415dde14f3400bec1b2756174a5d7179
|
|
end415dde14f3400bec1b2756174a5d7179:
|
|
;
|
|
// match: (MOVSDstore [off1] {sym1} (LEAQ8 [off2] {sym2} ptr idx) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSDstoreidx8 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ8 {
|
|
goto end1ad6fc0c5b59610dabf7f9595a48a230
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[0].Args[1]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end1ad6fc0c5b59610dabf7f9595a48a230
|
|
}
|
|
v.Op = OpAMD64MOVSDstoreidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end1ad6fc0c5b59610dabf7f9595a48a230
|
|
end1ad6fc0c5b59610dabf7f9595a48a230:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSDstoreidx8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSDstoreidx8 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx val mem)
|
|
// cond:
|
|
// result: (MOVSDstoreidx8 [addOff(off1, off2)] {sym} ptr idx val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endc0e28f57697cb6038d5d09eafe26c947
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
if v.Args[0].Aux != v.Aux {
|
|
goto endc0e28f57697cb6038d5d09eafe26c947
|
|
}
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[1]
|
|
val := v.Args[2]
|
|
mem := v.Args[3]
|
|
v.Op = OpAMD64MOVSDstoreidx8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endc0e28f57697cb6038d5d09eafe26c947
|
|
endc0e28f57697cb6038d5d09eafe26c947:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSSload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSSload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVSSload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end96d63dbb64b0adfa944684c9e939c972
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVSSload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end96d63dbb64b0adfa944684c9e939c972
|
|
end96d63dbb64b0adfa944684c9e939c972:
|
|
;
|
|
// match: (MOVSSload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSSload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end15f2583bd72ad7fc077b3952634a1c85
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end15f2583bd72ad7fc077b3952634a1c85
|
|
}
|
|
v.Op = OpAMD64MOVSSload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end15f2583bd72ad7fc077b3952634a1c85
|
|
end15f2583bd72ad7fc077b3952634a1c85:
|
|
;
|
|
// match: (MOVSSload [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSSloadidx4 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ4 {
|
|
goto end49722f4a0adba31bb143601ce1d2aae0
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[0].Args[1]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end49722f4a0adba31bb143601ce1d2aae0
|
|
}
|
|
v.Op = OpAMD64MOVSSloadidx4
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end49722f4a0adba31bb143601ce1d2aae0
|
|
end49722f4a0adba31bb143601ce1d2aae0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSSloadidx4(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSSloadidx4 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx mem)
|
|
// cond:
|
|
// result: (MOVSSloadidx4 [addOff(off1, off2)] {sym} ptr idx mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end7eb5a1ab1e2508683d879ec25286754b
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
if v.Args[0].Aux != v.Aux {
|
|
goto end7eb5a1ab1e2508683d879ec25286754b
|
|
}
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVSSloadidx4
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end7eb5a1ab1e2508683d879ec25286754b
|
|
end7eb5a1ab1e2508683d879ec25286754b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSSstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSSstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVSSstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endf711aa4081a9b2924b55387d4f70cfd6
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVSSstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endf711aa4081a9b2924b55387d4f70cfd6
|
|
endf711aa4081a9b2924b55387d4f70cfd6:
|
|
;
|
|
// match: (MOVSSstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSSstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end70ebc170131920e515e3f416a6b952c5
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end70ebc170131920e515e3f416a6b952c5
|
|
}
|
|
v.Op = OpAMD64MOVSSstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end70ebc170131920e515e3f416a6b952c5
|
|
end70ebc170131920e515e3f416a6b952c5:
|
|
;
|
|
// match: (MOVSSstore [off1] {sym1} (LEAQ4 [off2] {sym2} ptr idx) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVSSstoreidx4 [addOff(off1, off2)] {mergeSym(sym1,sym2)} ptr idx val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ4 {
|
|
goto end1622dc435e45833eda4d29d44df7cc34
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[0].Args[1]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end1622dc435e45833eda4d29d44df7cc34
|
|
}
|
|
v.Op = OpAMD64MOVSSstoreidx4
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end1622dc435e45833eda4d29d44df7cc34
|
|
end1622dc435e45833eda4d29d44df7cc34:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVSSstoreidx4(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVSSstoreidx4 [off1] {sym} (ADDQconst [off2] {sym} ptr) idx val mem)
|
|
// cond:
|
|
// result: (MOVSSstoreidx4 [addOff(off1, off2)] {sym} ptr idx val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end66e4853026306cd46f414c22d281254f
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
if v.Args[0].Aux != v.Aux {
|
|
goto end66e4853026306cd46f414c22d281254f
|
|
}
|
|
ptr := v.Args[0].Args[0]
|
|
idx := v.Args[1]
|
|
val := v.Args[2]
|
|
mem := v.Args[3]
|
|
v.Op = OpAMD64MOVSSstoreidx4
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(idx)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end66e4853026306cd46f414c22d281254f
|
|
end66e4853026306cd46f414c22d281254f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVWload(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVWload [off1] {sym} (ADDQconst [off2] ptr) mem)
|
|
// cond:
|
|
// result: (MOVWload [addOff(off1, off2)] {sym} ptr mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endfcb0ce76f96e8b0c2eb19a9b827c1b73
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVWload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endfcb0ce76f96e8b0c2eb19a9b827c1b73
|
|
endfcb0ce76f96e8b0c2eb19a9b827c1b73:
|
|
;
|
|
// match: (MOVWload [off1] {sym1} (LEAQ [off2] {sym2} base) mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVWload [addOff(off1,off2)] {mergeSym(sym1,sym2)} base mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end7a79314cb49bf53d79c38c3077d87457
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end7a79314cb49bf53d79c38c3077d87457
|
|
}
|
|
v.Op = OpAMD64MOVWload
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end7a79314cb49bf53d79c38c3077d87457
|
|
end7a79314cb49bf53d79c38c3077d87457:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVWstore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVWstore [off] {sym} ptr (MOVWQSX x) mem)
|
|
// cond:
|
|
// result: (MOVWstore [off] {sym} ptr x mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWQSX {
|
|
goto endca90c534e75c7f5cb803504d119a853f
|
|
}
|
|
x := v.Args[1].Args[0]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endca90c534e75c7f5cb803504d119a853f
|
|
endca90c534e75c7f5cb803504d119a853f:
|
|
;
|
|
// match: (MOVWstore [off] {sym} ptr (MOVWQZX x) mem)
|
|
// cond:
|
|
// result: (MOVWstore [off] {sym} ptr x mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWQZX {
|
|
goto end187fe73dfaf9cf5f4c349283b4dfd9d1
|
|
}
|
|
x := v.Args[1].Args[0]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(x)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end187fe73dfaf9cf5f4c349283b4dfd9d1
|
|
end187fe73dfaf9cf5f4c349283b4dfd9d1:
|
|
;
|
|
// match: (MOVWstore [off1] {sym} (ADDQconst [off2] ptr) val mem)
|
|
// cond:
|
|
// result: (MOVWstore [addOff(off1, off2)] {sym} ptr val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto endda15fdd59aa956ded0440188f38de1aa
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endda15fdd59aa956ded0440188f38de1aa
|
|
endda15fdd59aa956ded0440188f38de1aa:
|
|
;
|
|
// match: (MOVWstore [off] {sym} ptr (MOVWconst [c]) mem)
|
|
// cond: validOff(off)
|
|
// result: (MOVWstoreconst [makeValAndOff(int64(int16(c)),off)] {sym} ptr mem)
|
|
{
|
|
off := v.AuxInt
|
|
sym := v.Aux
|
|
ptr := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end60327daf9965d73a8c1971d098e1e31d
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
mem := v.Args[2]
|
|
if !(validOff(off)) {
|
|
goto end60327daf9965d73a8c1971d098e1e31d
|
|
}
|
|
v.Op = OpAMD64MOVWstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(int64(int16(c)), off)
|
|
v.Aux = sym
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end60327daf9965d73a8c1971d098e1e31d
|
|
end60327daf9965d73a8c1971d098e1e31d:
|
|
;
|
|
// match: (MOVWstore [off1] {sym1} (LEAQ [off2] {sym2} base) val mem)
|
|
// cond: canMergeSym(sym1, sym2)
|
|
// result: (MOVWstore [addOff(off1,off2)] {mergeSym(sym1,sym2)} base val mem)
|
|
{
|
|
off1 := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto end4cc466ede8e64e415c899ccac81c0f27
|
|
}
|
|
off2 := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
base := v.Args[0].Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(canMergeSym(sym1, sym2)) {
|
|
goto end4cc466ede8e64e415c899ccac81c0f27
|
|
}
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = addOff(off1, off2)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(base)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end4cc466ede8e64e415c899ccac81c0f27
|
|
end4cc466ede8e64e415c899ccac81c0f27:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MOVWstoreconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MOVWstoreconst [sc] {s} (ADDQconst [off] ptr) mem)
|
|
// cond: ValAndOff(sc).canAdd(off)
|
|
// result: (MOVWstoreconst [ValAndOff(sc).add(off)] {s} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
s := v.Aux
|
|
if v.Args[0].Op != OpAMD64ADDQconst {
|
|
goto end8825edac065f0e1c615ca5e6ba40e2de
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(ValAndOff(sc).canAdd(off)) {
|
|
goto end8825edac065f0e1c615ca5e6ba40e2de
|
|
}
|
|
v.Op = OpAMD64MOVWstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = s
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end8825edac065f0e1c615ca5e6ba40e2de
|
|
end8825edac065f0e1c615ca5e6ba40e2de:
|
|
;
|
|
// match: (MOVWstoreconst [sc] {sym1} (LEAQ [off] {sym2} ptr) mem)
|
|
// cond: canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)
|
|
// result: (MOVWstoreconst [ValAndOff(sc).add(off)] {mergeSym(sym1, sym2)} ptr mem)
|
|
{
|
|
sc := v.AuxInt
|
|
sym1 := v.Aux
|
|
if v.Args[0].Op != OpAMD64LEAQ {
|
|
goto endba47397e07b40a64fa4cad36ac2e32ad
|
|
}
|
|
off := v.Args[0].AuxInt
|
|
sym2 := v.Args[0].Aux
|
|
ptr := v.Args[0].Args[0]
|
|
mem := v.Args[1]
|
|
if !(canMergeSym(sym1, sym2) && ValAndOff(sc).canAdd(off)) {
|
|
goto endba47397e07b40a64fa4cad36ac2e32ad
|
|
}
|
|
v.Op = OpAMD64MOVWstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ValAndOff(sc).add(off)
|
|
v.Aux = mergeSym(sym1, sym2)
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endba47397e07b40a64fa4cad36ac2e32ad
|
|
endba47397e07b40a64fa4cad36ac2e32ad:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (MULBconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto end66c6419213ddeb52b1c53fb589a70e5f
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64MULBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end66c6419213ddeb52b1c53fb589a70e5f
|
|
end66c6419213ddeb52b1c53fb589a70e5f:
|
|
;
|
|
// match: (MULB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (MULBconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end7e82c8dbbba265b78035ca7df394bb06
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64MULBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end7e82c8dbbba265b78035ca7df394bb06
|
|
end7e82c8dbbba265b78035ca7df394bb06:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULBconst [c] (MOVBconst [d]))
|
|
// cond:
|
|
// result: (MOVBconst [c*d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endf2db9f96016085f8cb4082b4af01b2aa
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c * d
|
|
return true
|
|
}
|
|
goto endf2db9f96016085f8cb4082b4af01b2aa
|
|
endf2db9f96016085f8cb4082b4af01b2aa:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (MULLconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end893477a261bcad6c2821b77c83075c6c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64MULLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end893477a261bcad6c2821b77c83075c6c
|
|
end893477a261bcad6c2821b77c83075c6c:
|
|
;
|
|
// match: (MULL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (MULLconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end8a0f957c528a54eecb0dbfc5d96e017a
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64MULLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end8a0f957c528a54eecb0dbfc5d96e017a
|
|
end8a0f957c528a54eecb0dbfc5d96e017a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULLconst [c] (MOVLconst [d]))
|
|
// cond:
|
|
// result: (MOVLconst [c*d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto endd5732835ed1276ef8b728bcfc1289f73
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c * d
|
|
return true
|
|
}
|
|
goto endd5732835ed1276ef8b728bcfc1289f73
|
|
endd5732835ed1276ef8b728bcfc1289f73:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (MULQconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto endb38c6e3e0ddfa25ba0ef9684ac1528c0
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto endb38c6e3e0ddfa25ba0ef9684ac1528c0
|
|
}
|
|
v.Op = OpAMD64MULQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endb38c6e3e0ddfa25ba0ef9684ac1528c0
|
|
endb38c6e3e0ddfa25ba0ef9684ac1528c0:
|
|
;
|
|
// match: (MULQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (MULQconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end9cb4f29b0bd7141639416735dcbb3b87
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto end9cb4f29b0bd7141639416735dcbb3b87
|
|
}
|
|
v.Op = OpAMD64MULQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end9cb4f29b0bd7141639416735dcbb3b87
|
|
end9cb4f29b0bd7141639416735dcbb3b87:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULQconst [-1] x)
|
|
// cond:
|
|
// result: (NEGQ x)
|
|
{
|
|
if v.AuxInt != -1 {
|
|
goto end82501cca6b5fb121a7f8b197e55f2fec
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NEGQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end82501cca6b5fb121a7f8b197e55f2fec
|
|
end82501cca6b5fb121a7f8b197e55f2fec:
|
|
;
|
|
// match: (MULQconst [0] _)
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto endcb9faa068e3558ff44daaf1d47d091b5
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endcb9faa068e3558ff44daaf1d47d091b5
|
|
endcb9faa068e3558ff44daaf1d47d091b5:
|
|
;
|
|
// match: (MULQconst [1] x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
if v.AuxInt != 1 {
|
|
goto end0b527e71db2b288b2841a1f757aa580d
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0b527e71db2b288b2841a1f757aa580d
|
|
end0b527e71db2b288b2841a1f757aa580d:
|
|
;
|
|
// match: (MULQconst [3] x)
|
|
// cond:
|
|
// result: (LEAQ2 x x)
|
|
{
|
|
if v.AuxInt != 3 {
|
|
goto end34a86f261671b5852bec6c57155fe0da
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64LEAQ2
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end34a86f261671b5852bec6c57155fe0da
|
|
end34a86f261671b5852bec6c57155fe0da:
|
|
;
|
|
// match: (MULQconst [5] x)
|
|
// cond:
|
|
// result: (LEAQ4 x x)
|
|
{
|
|
if v.AuxInt != 5 {
|
|
goto end534601906c45a9171a9fec3e4b82b189
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64LEAQ4
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end534601906c45a9171a9fec3e4b82b189
|
|
end534601906c45a9171a9fec3e4b82b189:
|
|
;
|
|
// match: (MULQconst [9] x)
|
|
// cond:
|
|
// result: (LEAQ8 x x)
|
|
{
|
|
if v.AuxInt != 9 {
|
|
goto end48a2280b6459821289c56073b8354997
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64LEAQ8
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end48a2280b6459821289c56073b8354997
|
|
end48a2280b6459821289c56073b8354997:
|
|
;
|
|
// match: (MULQconst [c] x)
|
|
// cond: isPowerOfTwo(c)
|
|
// result: (SHLQconst [log2(c)] x)
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(isPowerOfTwo(c)) {
|
|
goto end75076953dbfe022526a153eda99b39b2
|
|
}
|
|
v.Op = OpAMD64SHLQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = log2(c)
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end75076953dbfe022526a153eda99b39b2
|
|
end75076953dbfe022526a153eda99b39b2:
|
|
;
|
|
// match: (MULQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [c*d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end55c38c5c405101e610d7ba7fc702ddc0
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c * d
|
|
return true
|
|
}
|
|
goto end55c38c5c405101e610d7ba7fc702ddc0
|
|
end55c38c5c405101e610d7ba7fc702ddc0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (MULWconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end542112cc08217d4bdffc1a645d290ffb
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64MULWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end542112cc08217d4bdffc1a645d290ffb
|
|
end542112cc08217d4bdffc1a645d290ffb:
|
|
;
|
|
// match: (MULW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (MULWconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto endd97b4245ced2b3d27d8c555b06281de4
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64MULWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd97b4245ced2b3d27d8c555b06281de4
|
|
endd97b4245ced2b3d27d8c555b06281de4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64MULWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (MULWconst [c] (MOVWconst [d]))
|
|
// cond:
|
|
// result: (MOVWconst [c*d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end61dbc9d9e93dd6946a20a1f475b3f74b
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c * d
|
|
return true
|
|
}
|
|
goto end61dbc9d9e93dd6946a20a1f475b3f74b
|
|
end61dbc9d9e93dd6946a20a1f475b3f74b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod16 x y)
|
|
// cond:
|
|
// result: (MODW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end036bac694be9fe0d6b00b86c2e625990
|
|
end036bac694be9fe0d6b00b86c2e625990:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod16u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod16u x y)
|
|
// cond:
|
|
// result: (MODWU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODWU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto enda75d900097f1510ca1c6df786bef0c24
|
|
enda75d900097f1510ca1c6df786bef0c24:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod32 x y)
|
|
// cond:
|
|
// result: (MODL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end12c8c0ecf3296810b8217cd4e40f7707
|
|
end12c8c0ecf3296810b8217cd4e40f7707:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod32u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod32u x y)
|
|
// cond:
|
|
// result: (MODLU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODLU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end1f0892076cfd58733a08d3ab175a3c1c
|
|
end1f0892076cfd58733a08d3ab175a3c1c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod64 x y)
|
|
// cond:
|
|
// result: (MODQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endaae75f449baf5dc108be4e0439af97f2
|
|
endaae75f449baf5dc108be4e0439af97f2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod64u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod64u x y)
|
|
// cond:
|
|
// result: (MODQU x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODQU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end0d4c8b9df77e59289fb14e2496559d1d
|
|
end0d4c8b9df77e59289fb14e2496559d1d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod8 x y)
|
|
// cond:
|
|
// result: (MODW (SignExt8to16 x) (SignExt8to16 y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.Type = config.fe.TypeInt16()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpSignExt8to16, TypeInvalid)
|
|
v1.AddArg(y)
|
|
v1.Type = config.fe.TypeInt16()
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endf959fc16e72bc6dc47ab7c9ee3778901
|
|
endf959fc16e72bc6dc47ab7c9ee3778901:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMod8u(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mod8u x y)
|
|
// cond:
|
|
// result: (MODWU (ZeroExt8to16 x) (ZeroExt8to16 y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MODWU
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.Type = config.fe.TypeUInt16()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpZeroExt8to16, TypeInvalid)
|
|
v1.AddArg(y)
|
|
v1.Type = config.fe.TypeUInt16()
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end9b3274d9dd7f1e91c75ce5e7b548fe97
|
|
end9b3274d9dd7f1e91c75ce5e7b548fe97:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMove(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Move [0] _ _ mem)
|
|
// cond:
|
|
// result: mem
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto end0961cbfe144a616cba75190d07d65e41
|
|
}
|
|
mem := v.Args[2]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = mem.Type
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end0961cbfe144a616cba75190d07d65e41
|
|
end0961cbfe144a616cba75190d07d65e41:
|
|
;
|
|
// match: (Move [1] dst src mem)
|
|
// cond:
|
|
// result: (MOVBstore dst (MOVBload src mem) mem)
|
|
{
|
|
if v.AuxInt != 1 {
|
|
goto end72e5dd27e999493b67ea3af4ecc60d48
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVBload, TypeInvalid)
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt8()
|
|
v.AddArg(v0)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end72e5dd27e999493b67ea3af4ecc60d48
|
|
end72e5dd27e999493b67ea3af4ecc60d48:
|
|
;
|
|
// match: (Move [2] dst src mem)
|
|
// cond:
|
|
// result: (MOVWstore dst (MOVWload src mem) mem)
|
|
{
|
|
if v.AuxInt != 2 {
|
|
goto end017f774e406d4578b4bcefcd8db8ec1e
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVWload, TypeInvalid)
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt16()
|
|
v.AddArg(v0)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end017f774e406d4578b4bcefcd8db8ec1e
|
|
end017f774e406d4578b4bcefcd8db8ec1e:
|
|
;
|
|
// match: (Move [4] dst src mem)
|
|
// cond:
|
|
// result: (MOVLstore dst (MOVLload src mem) mem)
|
|
{
|
|
if v.AuxInt != 4 {
|
|
goto end938ec47a2ddf8e9b4bf71ffade6e5b3f
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVLload, TypeInvalid)
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt32()
|
|
v.AddArg(v0)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end938ec47a2ddf8e9b4bf71ffade6e5b3f
|
|
end938ec47a2ddf8e9b4bf71ffade6e5b3f:
|
|
;
|
|
// match: (Move [8] dst src mem)
|
|
// cond:
|
|
// result: (MOVQstore dst (MOVQload src mem) mem)
|
|
{
|
|
if v.AuxInt != 8 {
|
|
goto end696b3498f5fee17f49ae0f708d3dfe4b
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVQstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQload, TypeInvalid)
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end696b3498f5fee17f49ae0f708d3dfe4b
|
|
end696b3498f5fee17f49ae0f708d3dfe4b:
|
|
;
|
|
// match: (Move [16] dst src mem)
|
|
// cond:
|
|
// result: (MOVOstore dst (MOVOload src mem) mem)
|
|
{
|
|
if v.AuxInt != 16 {
|
|
goto end4894ace925d468c10a5b0c5b91fc4c1c
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVOstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVOload, TypeInvalid)
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = TypeInt128
|
|
v.AddArg(v0)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end4894ace925d468c10a5b0c5b91fc4c1c
|
|
end4894ace925d468c10a5b0c5b91fc4c1c:
|
|
;
|
|
// match: (Move [3] dst src mem)
|
|
// cond:
|
|
// result: (MOVBstore [2] dst (MOVBload [2] src mem) (MOVWstore dst (MOVWload src mem) mem))
|
|
{
|
|
if v.AuxInt != 3 {
|
|
goto end76ce0004999139fe4608c3c5356eb364
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 2
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVBload, TypeInvalid)
|
|
v0.AuxInt = 2
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt8()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVWstore, TypeInvalid)
|
|
v1.AddArg(dst)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVWload, TypeInvalid)
|
|
v2.AddArg(src)
|
|
v2.AddArg(mem)
|
|
v2.Type = config.fe.TypeUInt16()
|
|
v1.AddArg(v2)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end76ce0004999139fe4608c3c5356eb364
|
|
end76ce0004999139fe4608c3c5356eb364:
|
|
;
|
|
// match: (Move [5] dst src mem)
|
|
// cond:
|
|
// result: (MOVBstore [4] dst (MOVBload [4] src mem) (MOVLstore dst (MOVLload src mem) mem))
|
|
{
|
|
if v.AuxInt != 5 {
|
|
goto end21378690c0f39bdd6b46566d57da34e3
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 4
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVBload, TypeInvalid)
|
|
v0.AuxInt = 4
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt8()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeInvalid)
|
|
v1.AddArg(dst)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVLload, TypeInvalid)
|
|
v2.AddArg(src)
|
|
v2.AddArg(mem)
|
|
v2.Type = config.fe.TypeUInt32()
|
|
v1.AddArg(v2)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end21378690c0f39bdd6b46566d57da34e3
|
|
end21378690c0f39bdd6b46566d57da34e3:
|
|
;
|
|
// match: (Move [6] dst src mem)
|
|
// cond:
|
|
// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVLstore dst (MOVLload src mem) mem))
|
|
{
|
|
if v.AuxInt != 6 {
|
|
goto endcb6e509881d8638d8cae3af4f2b19a8e
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 4
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVWload, TypeInvalid)
|
|
v0.AuxInt = 4
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt16()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeInvalid)
|
|
v1.AddArg(dst)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVLload, TypeInvalid)
|
|
v2.AddArg(src)
|
|
v2.AddArg(mem)
|
|
v2.Type = config.fe.TypeUInt32()
|
|
v1.AddArg(v2)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endcb6e509881d8638d8cae3af4f2b19a8e
|
|
endcb6e509881d8638d8cae3af4f2b19a8e:
|
|
;
|
|
// match: (Move [7] dst src mem)
|
|
// cond:
|
|
// result: (MOVLstore [3] dst (MOVLload [3] src mem) (MOVLstore dst (MOVLload src mem) mem))
|
|
{
|
|
if v.AuxInt != 7 {
|
|
goto end3429ae54bc071c0856ad366c79b7ab97
|
|
}
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 3
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVLload, TypeInvalid)
|
|
v0.AuxInt = 3
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt32()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVLstore, TypeInvalid)
|
|
v1.AddArg(dst)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVLload, TypeInvalid)
|
|
v2.AddArg(src)
|
|
v2.AddArg(mem)
|
|
v2.Type = config.fe.TypeUInt32()
|
|
v1.AddArg(v2)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end3429ae54bc071c0856ad366c79b7ab97
|
|
end3429ae54bc071c0856ad366c79b7ab97:
|
|
;
|
|
// match: (Move [size] dst src mem)
|
|
// cond: size > 8 && size < 16
|
|
// result: (MOVQstore [size-8] dst (MOVQload [size-8] src mem) (MOVQstore dst (MOVQload src mem) mem))
|
|
{
|
|
size := v.AuxInt
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(size > 8 && size < 16) {
|
|
goto endc90f121709d5411d389649dea89a2251
|
|
}
|
|
v.Op = OpAMD64MOVQstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = size - 8
|
|
v.AddArg(dst)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQload, TypeInvalid)
|
|
v0.AuxInt = size - 8
|
|
v0.AddArg(src)
|
|
v0.AddArg(mem)
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
|
|
v1.AddArg(dst)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVQload, TypeInvalid)
|
|
v2.AddArg(src)
|
|
v2.AddArg(mem)
|
|
v2.Type = config.fe.TypeUInt64()
|
|
v1.AddArg(v2)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endc90f121709d5411d389649dea89a2251
|
|
endc90f121709d5411d389649dea89a2251:
|
|
;
|
|
// match: (Move [size] dst src mem)
|
|
// cond: size > 16 && size%16 != 0 && size%16 <= 8
|
|
// result: (Move [size-size%16] (ADDQconst <dst.Type> dst [size%16]) (ADDQconst <src.Type> src [size%16]) (MOVQstore dst (MOVQload src mem) mem))
|
|
{
|
|
size := v.AuxInt
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(size > 16 && size%16 != 0 && size%16 <= 8) {
|
|
goto end376c57db23b866866f23677c6cde43ba
|
|
}
|
|
v.Op = OpMove
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = size - size%16
|
|
v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v0.Type = dst.Type
|
|
v0.AddArg(dst)
|
|
v0.AuxInt = size % 16
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v1.Type = src.Type
|
|
v1.AddArg(src)
|
|
v1.AuxInt = size % 16
|
|
v.AddArg(v1)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
|
|
v2.AddArg(dst)
|
|
v3 := b.NewValue0(v.Line, OpAMD64MOVQload, TypeInvalid)
|
|
v3.AddArg(src)
|
|
v3.AddArg(mem)
|
|
v3.Type = config.fe.TypeUInt64()
|
|
v2.AddArg(v3)
|
|
v2.AddArg(mem)
|
|
v2.Type = TypeMem
|
|
v.AddArg(v2)
|
|
return true
|
|
}
|
|
goto end376c57db23b866866f23677c6cde43ba
|
|
end376c57db23b866866f23677c6cde43ba:
|
|
;
|
|
// match: (Move [size] dst src mem)
|
|
// cond: size > 16 && size%16 != 0 && size%16 > 8
|
|
// result: (Move [size-size%16] (ADDQconst <dst.Type> dst [size%16]) (ADDQconst <src.Type> src [size%16]) (MOVOstore dst (MOVOload src mem) mem))
|
|
{
|
|
size := v.AuxInt
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(size > 16 && size%16 != 0 && size%16 > 8) {
|
|
goto end2f82f76766a21f8802768380cf10a497
|
|
}
|
|
v.Op = OpMove
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = size - size%16
|
|
v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v0.Type = dst.Type
|
|
v0.AddArg(dst)
|
|
v0.AuxInt = size % 16
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v1.Type = src.Type
|
|
v1.AddArg(src)
|
|
v1.AuxInt = size % 16
|
|
v.AddArg(v1)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVOstore, TypeInvalid)
|
|
v2.AddArg(dst)
|
|
v3 := b.NewValue0(v.Line, OpAMD64MOVOload, TypeInvalid)
|
|
v3.AddArg(src)
|
|
v3.AddArg(mem)
|
|
v3.Type = TypeInt128
|
|
v2.AddArg(v3)
|
|
v2.AddArg(mem)
|
|
v2.Type = TypeMem
|
|
v.AddArg(v2)
|
|
return true
|
|
}
|
|
goto end2f82f76766a21f8802768380cf10a497
|
|
end2f82f76766a21f8802768380cf10a497:
|
|
;
|
|
// match: (Move [size] dst src mem)
|
|
// cond: size >= 32 && size <= 16*64 && size%16 == 0
|
|
// result: (DUFFCOPY [14*(64-size/16)] dst src mem)
|
|
{
|
|
size := v.AuxInt
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(size >= 32 && size <= 16*64 && size%16 == 0) {
|
|
goto endcb66da6685f0079ee1f84d10fa561f22
|
|
}
|
|
v.Op = OpAMD64DUFFCOPY
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 14 * (64 - size/16)
|
|
v.AddArg(dst)
|
|
v.AddArg(src)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endcb66da6685f0079ee1f84d10fa561f22
|
|
endcb66da6685f0079ee1f84d10fa561f22:
|
|
;
|
|
// match: (Move [size] dst src mem)
|
|
// cond: size > 16*64 && size%8 == 0
|
|
// result: (REPMOVSQ dst src (MOVQconst [size/8]) mem)
|
|
{
|
|
size := v.AuxInt
|
|
dst := v.Args[0]
|
|
src := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(size > 16*64 && size%8 == 0) {
|
|
goto end7ae25ff1bbdcf34efef09613745e9d6e
|
|
}
|
|
v.Op = OpAMD64REPMOVSQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(dst)
|
|
v.AddArg(src)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
|
|
v0.AuxInt = size / 8
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end7ae25ff1bbdcf34efef09613745e9d6e
|
|
end7ae25ff1bbdcf34efef09613745e9d6e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMul16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mul16 x y)
|
|
// cond:
|
|
// result: (MULW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MULW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end1addf5ea2c885aa1729b8f944859d00c
|
|
end1addf5ea2c885aa1729b8f944859d00c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMul32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mul32 x y)
|
|
// cond:
|
|
// result: (MULL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MULL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto ende144381f85808e5144782804768e2859
|
|
ende144381f85808e5144782804768e2859:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMul32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mul32F x y)
|
|
// cond:
|
|
// result: (MULSS x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MULSS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end32105a3bfe0237b799b69d83b3f171ca
|
|
end32105a3bfe0237b799b69d83b3f171ca:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMul64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mul64 x y)
|
|
// cond:
|
|
// result: (MULQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MULQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end38da21e77ac329eb643b20e7d97d5853
|
|
end38da21e77ac329eb643b20e7d97d5853:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMul64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mul64F x y)
|
|
// cond:
|
|
// result: (MULSD x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MULSD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end0ff6e1919fb0a3e549eb82b43edf1f52
|
|
end0ff6e1919fb0a3e549eb82b43edf1f52:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpMul8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Mul8 x y)
|
|
// cond:
|
|
// result: (MULB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64MULB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endd876d6bc42a2285b801f42dadbd8757c
|
|
endd876d6bc42a2285b801f42dadbd8757c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NEGB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NEGB (MOVBconst [c]))
|
|
// cond:
|
|
// result: (MOVBconst [-c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end36d0300ba9eab8c9da86246ff653ca96
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c
|
|
return true
|
|
}
|
|
goto end36d0300ba9eab8c9da86246ff653ca96
|
|
end36d0300ba9eab8c9da86246ff653ca96:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NEGL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NEGL (MOVLconst [c]))
|
|
// cond:
|
|
// result: (MOVLconst [-c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end7a245ec67e56bd51911e5ba2d0aa0a16
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c
|
|
return true
|
|
}
|
|
goto end7a245ec67e56bd51911e5ba2d0aa0a16
|
|
end7a245ec67e56bd51911e5ba2d0aa0a16:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NEGQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NEGQ (MOVQconst [c]))
|
|
// cond:
|
|
// result: (MOVQconst [-c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end04ddd98bc6724ecb85c80c2a4e2bca5a
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c
|
|
return true
|
|
}
|
|
goto end04ddd98bc6724ecb85c80c2a4e2bca5a
|
|
end04ddd98bc6724ecb85c80c2a4e2bca5a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NEGW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NEGW (MOVWconst [c]))
|
|
// cond:
|
|
// result: (MOVWconst [-c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end1db6636f0a51848d8a34f6561ecfe7ae
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c
|
|
return true
|
|
}
|
|
goto end1db6636f0a51848d8a34f6561ecfe7ae
|
|
end1db6636f0a51848d8a34f6561ecfe7ae:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NOTB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NOTB (MOVBconst [c]))
|
|
// cond:
|
|
// result: (MOVBconst [^c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end9e383a9ceb29a9e2bf890ec6a67212a8
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ^c
|
|
return true
|
|
}
|
|
goto end9e383a9ceb29a9e2bf890ec6a67212a8
|
|
end9e383a9ceb29a9e2bf890ec6a67212a8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NOTL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NOTL (MOVLconst [c]))
|
|
// cond:
|
|
// result: (MOVLconst [^c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto endcc73972c088d5e652a1370a96e56502d
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ^c
|
|
return true
|
|
}
|
|
goto endcc73972c088d5e652a1370a96e56502d
|
|
endcc73972c088d5e652a1370a96e56502d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NOTQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NOTQ (MOVQconst [c]))
|
|
// cond:
|
|
// result: (MOVQconst [^c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto endb39ddb6bf7339d46f74114baad4333b6
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ^c
|
|
return true
|
|
}
|
|
goto endb39ddb6bf7339d46f74114baad4333b6
|
|
endb39ddb6bf7339d46f74114baad4333b6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64NOTW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NOTW (MOVWconst [c]))
|
|
// cond:
|
|
// result: (MOVWconst [^c])
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end35848095ebcf894c6957ad3be5f82c43
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = ^c
|
|
return true
|
|
}
|
|
goto end35848095ebcf894c6957ad3be5f82c43
|
|
end35848095ebcf894c6957ad3be5f82c43:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeg16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neg16 x)
|
|
// cond:
|
|
// result: (NEGW x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NEGW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end7a8c652f4ffeb49656119af69512edb2
|
|
end7a8c652f4ffeb49656119af69512edb2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeg32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neg32 x)
|
|
// cond:
|
|
// result: (NEGL x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NEGL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endce1f7e17fc193f6c076e47d5e401e126
|
|
endce1f7e17fc193f6c076e47d5e401e126:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeg32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neg32F x)
|
|
// cond:
|
|
// result: (PXOR x (MOVSSconst <config.Frontend().TypeFloat32()> [f2i(math.Copysign(0, -1))]))
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64PXOR
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVSSconst, TypeInvalid)
|
|
v0.Type = config.Frontend().TypeFloat32()
|
|
v0.AuxInt = f2i(math.Copysign(0, -1))
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end685a5fc899e195b9091afbe2a7146051
|
|
end685a5fc899e195b9091afbe2a7146051:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeg64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neg64 x)
|
|
// cond:
|
|
// result: (NEGQ x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NEGQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda06c5b1718f2b96aba10bf5a5c437c6c
|
|
enda06c5b1718f2b96aba10bf5a5c437c6c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeg64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neg64F x)
|
|
// cond:
|
|
// result: (PXOR x (MOVSDconst <config.Frontend().TypeFloat64()> [f2i(math.Copysign(0, -1))]))
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64PXOR
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVSDconst, TypeInvalid)
|
|
v0.Type = config.Frontend().TypeFloat64()
|
|
v0.AuxInt = f2i(math.Copysign(0, -1))
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto ende85ae82b7a51e75000eb9158d584acb2
|
|
ende85ae82b7a51e75000eb9158d584acb2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeg8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neg8 x)
|
|
// cond:
|
|
// result: (NEGB x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64NEGB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1e5f495a2ac6cdea47b1ae5ba62aa95d
|
|
end1e5f495a2ac6cdea47b1ae5ba62aa95d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeq16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neq16 x y)
|
|
// cond:
|
|
// result: (SETNE (CMPW x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPW, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end6413ee42d523a005cce9e3372ff2c8e9
|
|
end6413ee42d523a005cce9e3372ff2c8e9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeq32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neq32 x y)
|
|
// cond:
|
|
// result: (SETNE (CMPL x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPL, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb1a3ad499a09d8262952e6cbc47a23a8
|
|
endb1a3ad499a09d8262952e6cbc47a23a8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeq32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neq32F x y)
|
|
// cond:
|
|
// result: (SETNEF (UCOMISS x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNEF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISS, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end2a001b2774f58aaf8c1e9efce6ae59e7
|
|
end2a001b2774f58aaf8c1e9efce6ae59e7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeq64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neq64 x y)
|
|
// cond:
|
|
// result: (SETNE (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end092b9159bce08d2ef7896f7d3da5a595
|
|
end092b9159bce08d2ef7896f7d3da5a595:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeq64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neq64F x y)
|
|
// cond:
|
|
// result: (SETNEF (UCOMISD x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNEF
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64UCOMISD, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb9c010023c38bd2fee7800fbefc85d98
|
|
endb9c010023c38bd2fee7800fbefc85d98:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeq8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Neq8 x y)
|
|
// cond:
|
|
// result: (SETNE (CMPB x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPB, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end89e59f45e068c89458cc4db1692bf3bb
|
|
end89e59f45e068c89458cc4db1692bf3bb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNeqPtr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NeqPtr x y)
|
|
// cond:
|
|
// result: (SETNE (CMPQ x y))
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64CMPQ, TypeInvalid)
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v0.Type = TypeFlags
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end3b8bb3b4952011d1d40f993d8717cf16
|
|
end3b8bb3b4952011d1d40f993d8717cf16:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNilCheck(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (NilCheck ptr mem)
|
|
// cond:
|
|
// result: (LoweredNilCheck ptr mem)
|
|
{
|
|
ptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64LoweredNilCheck
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end75520e60179564948a625707b84e8a8d
|
|
end75520e60179564948a625707b84e8a8d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpNot(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Not x)
|
|
// cond:
|
|
// result: (XORBconst [1] x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64XORBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end73973101aad60079c62fa64624e21db1
|
|
end73973101aad60079c62fa64624e21db1:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (ORBconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto end7b63870decde2515cb77ec4f8f76817c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ORBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end7b63870decde2515cb77ec4f8f76817c
|
|
end7b63870decde2515cb77ec4f8f76817c:
|
|
;
|
|
// match: (ORB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (ORBconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end70b43d531e2097a4f6293f66256a642e
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ORBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end70b43d531e2097a4f6293f66256a642e
|
|
end70b43d531e2097a4f6293f66256a642e:
|
|
;
|
|
// match: (ORB x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto enddca5ce800a9eca157f243cb2fdb1408a
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enddca5ce800a9eca157f243cb2fdb1408a
|
|
enddca5ce800a9eca157f243cb2fdb1408a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORBconst [c] x)
|
|
// cond: int8(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int8(c) == 0) {
|
|
goto end565f78e3a843dc73943b59227b39a1b3
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end565f78e3a843dc73943b59227b39a1b3
|
|
end565f78e3a843dc73943b59227b39a1b3:
|
|
;
|
|
// match: (ORBconst [c] _)
|
|
// cond: int8(c)==-1
|
|
// result: (MOVBconst [-1])
|
|
{
|
|
c := v.AuxInt
|
|
if !(int8(c) == -1) {
|
|
goto end6033c7910d8cd536b31446e179e4610d
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto end6033c7910d8cd536b31446e179e4610d
|
|
end6033c7910d8cd536b31446e179e4610d:
|
|
;
|
|
// match: (ORBconst [c] (MOVBconst [d]))
|
|
// cond:
|
|
// result: (MOVBconst [c|d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endbe5263f022dc10a5cf53c118937d79dd
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c | d
|
|
return true
|
|
}
|
|
goto endbe5263f022dc10a5cf53c118937d79dd
|
|
endbe5263f022dc10a5cf53c118937d79dd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (ORLconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end1b883e30d860b6fac14ae98462c4f61a
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ORLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1b883e30d860b6fac14ae98462c4f61a
|
|
end1b883e30d860b6fac14ae98462c4f61a:
|
|
;
|
|
// match: (ORL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (ORLconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto enda5bc49524a0cbd2241f792837d0a48a8
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ORLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda5bc49524a0cbd2241f792837d0a48a8
|
|
enda5bc49524a0cbd2241f792837d0a48a8:
|
|
;
|
|
// match: (ORL x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end2dd719b68f4938777ef0d820aab93659
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end2dd719b68f4938777ef0d820aab93659
|
|
end2dd719b68f4938777ef0d820aab93659:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORLconst [c] x)
|
|
// cond: int32(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int32(c) == 0) {
|
|
goto end5b52623a724e8a7167c71289fb7192f1
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end5b52623a724e8a7167c71289fb7192f1
|
|
end5b52623a724e8a7167c71289fb7192f1:
|
|
;
|
|
// match: (ORLconst [c] _)
|
|
// cond: int32(c)==-1
|
|
// result: (MOVLconst [-1])
|
|
{
|
|
c := v.AuxInt
|
|
if !(int32(c) == -1) {
|
|
goto end345a8ea439ef2ef54bd84fc8a0f73e97
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto end345a8ea439ef2ef54bd84fc8a0f73e97
|
|
end345a8ea439ef2ef54bd84fc8a0f73e97:
|
|
;
|
|
// match: (ORLconst [c] (MOVLconst [d]))
|
|
// cond:
|
|
// result: (MOVLconst [c|d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto ende9ca05024248f782c88084715f81d727
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c | d
|
|
return true
|
|
}
|
|
goto ende9ca05024248f782c88084715f81d727
|
|
ende9ca05024248f782c88084715f81d727:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (ORQconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end601f2bb3ccda102e484ff60adeaf6d26
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto end601f2bb3ccda102e484ff60adeaf6d26
|
|
}
|
|
v.Op = OpAMD64ORQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end601f2bb3ccda102e484ff60adeaf6d26
|
|
end601f2bb3ccda102e484ff60adeaf6d26:
|
|
;
|
|
// match: (ORQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (ORQconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end010afbebcd314e288509d79a16a6d5cc
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto end010afbebcd314e288509d79a16a6d5cc
|
|
}
|
|
v.Op = OpAMD64ORQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end010afbebcd314e288509d79a16a6d5cc
|
|
end010afbebcd314e288509d79a16a6d5cc:
|
|
;
|
|
// match: (ORQ x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end47a27d30b82db576978c5a3a57b520fb
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end47a27d30b82db576978c5a3a57b520fb
|
|
end47a27d30b82db576978c5a3a57b520fb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORQconst [0] x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto end44534da6b9ce98d33fad7e20f0be1fbd
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end44534da6b9ce98d33fad7e20f0be1fbd
|
|
end44534da6b9ce98d33fad7e20f0be1fbd:
|
|
;
|
|
// match: (ORQconst [-1] _)
|
|
// cond:
|
|
// result: (MOVQconst [-1])
|
|
{
|
|
if v.AuxInt != -1 {
|
|
goto endcde9b9d7c4527eaa5d50b252f50b43c1
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto endcde9b9d7c4527eaa5d50b252f50b43c1
|
|
endcde9b9d7c4527eaa5d50b252f50b43c1:
|
|
;
|
|
// match: (ORQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [c|d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto enda2488509b71db9abcb06a5115c4ddc2c
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c | d
|
|
return true
|
|
}
|
|
goto enda2488509b71db9abcb06a5115c4ddc2c
|
|
enda2488509b71db9abcb06a5115c4ddc2c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (ORWconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end9f98df10892dbf170b49aace86ee0d7f
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64ORWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end9f98df10892dbf170b49aace86ee0d7f
|
|
end9f98df10892dbf170b49aace86ee0d7f:
|
|
;
|
|
// match: (ORW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (ORWconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end96405942c9ceb5fcb0ddb85a8709d015
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64ORWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end96405942c9ceb5fcb0ddb85a8709d015
|
|
end96405942c9ceb5fcb0ddb85a8709d015:
|
|
;
|
|
// match: (ORW x x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto endc6a23b64e541dc9cfc6a90fd7028e8c1
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endc6a23b64e541dc9cfc6a90fd7028e8c1
|
|
endc6a23b64e541dc9cfc6a90fd7028e8c1:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64ORWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ORWconst [c] x)
|
|
// cond: int16(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int16(c) == 0) {
|
|
goto endbbbdec9091c8b4c58e587eac8a43402d
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endbbbdec9091c8b4c58e587eac8a43402d
|
|
endbbbdec9091c8b4c58e587eac8a43402d:
|
|
;
|
|
// match: (ORWconst [c] _)
|
|
// cond: int16(c)==-1
|
|
// result: (MOVWconst [-1])
|
|
{
|
|
c := v.AuxInt
|
|
if !(int16(c) == -1) {
|
|
goto ended87a5775f5e04b2d2a117a63d82dd9b
|
|
}
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto ended87a5775f5e04b2d2a117a63d82dd9b
|
|
ended87a5775f5e04b2d2a117a63d82dd9b:
|
|
;
|
|
// match: (ORWconst [c] (MOVWconst [d]))
|
|
// cond:
|
|
// result: (MOVWconst [c|d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto endba9221a8462b5c62e8d7c686f64c2778
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c | d
|
|
return true
|
|
}
|
|
goto endba9221a8462b5c62e8d7c686f64c2778
|
|
endba9221a8462b5c62e8d7c686f64c2778:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpOffPtr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (OffPtr [off] ptr)
|
|
// cond:
|
|
// result: (ADDQconst [off] ptr)
|
|
{
|
|
off := v.AuxInt
|
|
ptr := v.Args[0]
|
|
v.Op = OpAMD64ADDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = off
|
|
v.AddArg(ptr)
|
|
return true
|
|
}
|
|
goto end0429f947ee7ac49ff45a243e461a5290
|
|
end0429f947ee7ac49ff45a243e461a5290:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpOr16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Or16 x y)
|
|
// cond:
|
|
// result: (ORW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ORW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end8fedf2c79d5607b7056b0ff015199cbd
|
|
end8fedf2c79d5607b7056b0ff015199cbd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpOr32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Or32 x y)
|
|
// cond:
|
|
// result: (ORL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ORL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endea45bed9ca97d2995b68b53e6012d384
|
|
endea45bed9ca97d2995b68b53e6012d384:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpOr64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Or64 x y)
|
|
// cond:
|
|
// result: (ORQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ORQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end3a446becaf2461f4f1a41faeef313f41
|
|
end3a446becaf2461f4f1a41faeef313f41:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpOr8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Or8 x y)
|
|
// cond:
|
|
// result: (ORB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ORB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end6f8a8c559a167d1f0a5901d09a1fb248
|
|
end6f8a8c559a167d1f0a5901d09a1fb248:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16Ux16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16Ux16 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPWconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end291acf0117b46a676e5e1fe524459800
|
|
end291acf0117b46a676e5e1fe524459800:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16Ux32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16Ux32 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPLconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endea051fe538151b144cd630ce63d35bf7
|
|
endea051fe538151b144cd630ce63d35bf7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16Ux64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16Ux64 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPQconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endd1a8f3aa91391fbd13c2dcd03a75283a
|
|
endd1a8f3aa91391fbd13c2dcd03a75283a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16Ux8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16Ux8 <t> x y)
|
|
// cond:
|
|
// result: (ANDW (SHRW <t> x y) (SBBLcarrymask <t> (CMPBconst y [16])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRW, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 16
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end9de32652fceccadca5a6206066bcbb10
|
|
end9de32652fceccadca5a6206066bcbb10:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16x16 <t> x y)
|
|
// cond:
|
|
// result: (SARW <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [16])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 16
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end71e3cf43426d4351f7fac15145ca6cd9
|
|
end71e3cf43426d4351f7fac15145ca6cd9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16x32 <t> x y)
|
|
// cond:
|
|
// result: (SARW <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [16])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 16
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endfc3bf56711046c6b29b676b155af7c98
|
|
endfc3bf56711046c6b29b676b155af7c98:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16x64 <t> x y)
|
|
// cond:
|
|
// result: (SARW <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [16])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 16
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endeaf40562fd3394586c63adceca4d9559
|
|
endeaf40562fd3394586c63adceca4d9559:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh16x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh16x8 <t> x y)
|
|
// cond:
|
|
// result: (SARW <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [16])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 16
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endc6cd0d3ecc71bc1830e01c07f274ff7b
|
|
endc6cd0d3ecc71bc1830e01c07f274ff7b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32Ux16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32Ux16 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPWconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end74ddc1443f6ffb1fe911f455ff982bfb
|
|
end74ddc1443f6ffb1fe911f455ff982bfb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32Ux32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32Ux32 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPLconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto enda93828d8aa54be68080640034f94ed96
|
|
enda93828d8aa54be68080640034f94ed96:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32Ux64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32Ux64 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPQconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end4f644f3f89ef842f4b0567fc385a58e3
|
|
end4f644f3f89ef842f4b0567fc385a58e3:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32Ux8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32Ux8 <t> x y)
|
|
// cond:
|
|
// result: (ANDL (SHRL <t> x y) (SBBLcarrymask <t> (CMPBconst y [32])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRL, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 32
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end2a8f279bb4900b9bf3846378f36d7994
|
|
end2a8f279bb4900b9bf3846378f36d7994:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32x16 <t> x y)
|
|
// cond:
|
|
// result: (SARL <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [32])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 32
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end1b3a698a50c89c656aa6f7acd72e3f5e
|
|
end1b3a698a50c89c656aa6f7acd72e3f5e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32x32 <t> x y)
|
|
// cond:
|
|
// result: (SARL <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [32])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 32
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endc6596de1c198fd84c4076aaa3c6486e5
|
|
endc6596de1c198fd84c4076aaa3c6486e5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32x64 <t> x y)
|
|
// cond:
|
|
// result: (SARL <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [32])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 32
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto enddda2e730607e2d13b18f1006316e0ebb
|
|
enddda2e730607e2d13b18f1006316e0ebb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh32x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh32x8 <t> x y)
|
|
// cond:
|
|
// result: (SARL <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [32])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 32
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endd9cb28c7e3a43fbd7a877750f34df72a
|
|
endd9cb28c7e3a43fbd7a877750f34df72a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64Ux16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64Ux16 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPWconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end04dfdfa8a2dcffaf7ab1ee93a96b8677
|
|
end04dfdfa8a2dcffaf7ab1ee93a96b8677:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64Ux32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64Ux32 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPLconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end2b2f03d14fb01fd490115a96d893ddb3
|
|
end2b2f03d14fb01fd490115a96d893ddb3:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64Ux64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64Ux64 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPQconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endb24ca32f261a5c799d3e5a572f7cdcff
|
|
endb24ca32f261a5c799d3e5a572f7cdcff:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64Ux8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64Ux8 <t> x y)
|
|
// cond:
|
|
// result: (ANDQ (SHRQ <t> x y) (SBBQcarrymask <t> (CMPBconst y [64])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRQ, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 64
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end05a9a99310c9e282df012d5c48b58475
|
|
end05a9a99310c9e282df012d5c48b58475:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64x16 <t> x y)
|
|
// cond:
|
|
// result: (SARQ <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [64])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 64
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb97b88b7c4e431bd64ced5690f0e85c4
|
|
endb97b88b7c4e431bd64ced5690f0e85c4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64x32 <t> x y)
|
|
// cond:
|
|
// result: (SARQ <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [64])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 64
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end95f72c0d315e6b1d70015b31a0f5f4ca
|
|
end95f72c0d315e6b1d70015b31a0f5f4ca:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64x64 <t> x y)
|
|
// cond:
|
|
// result: (SARQ <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [64])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 64
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto enda8ddfaa8e519c0ed70c344a136ba9126
|
|
enda8ddfaa8e519c0ed70c344a136ba9126:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh64x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh64x8 <t> x y)
|
|
// cond:
|
|
// result: (SARQ <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [64])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 64
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end62f4adae0bbd0c4d5d6eb7d5eda6a5e3
|
|
end62f4adae0bbd0c4d5d6eb7d5eda6a5e3:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8Ux16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8Ux16 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPWconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endb791c8283bd486da9809520a7262d5ba
|
|
endb791c8283bd486da9809520a7262d5ba:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8Ux32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8Ux32 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPLconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end5f360ab34942dc218e8f75624c86bbb2
|
|
end5f360ab34942dc218e8f75624c86bbb2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8Ux64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8Ux64 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPQconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end7138df590f00234cd21cf02da8ed109e
|
|
end7138df590f00234cd21cf02da8ed109e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8Ux8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8Ux8 <t> x y)
|
|
// cond:
|
|
// result: (ANDB (SHRB <t> x y) (SBBLcarrymask <t> (CMPBconst y [8])))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64ANDB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SHRB, TypeInvalid)
|
|
v0.Type = t
|
|
v0.AddArg(x)
|
|
v0.AddArg(y)
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v1.Type = t
|
|
v2 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v2.AddArg(y)
|
|
v2.AuxInt = 8
|
|
v2.Type = TypeFlags
|
|
v1.AddArg(v2)
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end3aab873310bf7b2f3f90705fbd082b93
|
|
end3aab873310bf7b2f3f90705fbd082b93:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8x16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8x16 <t> x y)
|
|
// cond:
|
|
// result: (SARB <t> x (ORW <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPWconst y [8])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORW, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPWconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 8
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto ende275bad06ac788b484b038f1bb3afc8d
|
|
ende275bad06ac788b484b038f1bb3afc8d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8x32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8x32 <t> x y)
|
|
// cond:
|
|
// result: (SARB <t> x (ORL <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPLconst y [8])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORL, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPLconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 8
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end00833cba5173dc390952b6c4644af376
|
|
end00833cba5173dc390952b6c4644af376:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8x64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8x64 <t> x y)
|
|
// cond:
|
|
// result: (SARB <t> x (ORQ <y.Type> y (NOTQ <y.Type> (SBBQcarrymask <y.Type> (CMPQconst y [8])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORQ, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTQ, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBQcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPQconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 8
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end039cf4d3a939b89164b058d09f532fb5
|
|
end039cf4d3a939b89164b058d09f532fb5:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpRsh8x8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Rsh8x8 <t> x y)
|
|
// cond:
|
|
// result: (SARB <t> x (ORB <y.Type> y (NOTL <y.Type> (SBBLcarrymask <y.Type> (CMPBconst y [8])))))
|
|
{
|
|
t := v.Type
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SARB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = t
|
|
v.AddArg(x)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ORB, TypeInvalid)
|
|
v0.Type = y.Type
|
|
v0.AddArg(y)
|
|
v1 := b.NewValue0(v.Line, OpAMD64NOTL, TypeInvalid)
|
|
v1.Type = y.Type
|
|
v2 := b.NewValue0(v.Line, OpAMD64SBBLcarrymask, TypeInvalid)
|
|
v2.Type = y.Type
|
|
v3 := b.NewValue0(v.Line, OpAMD64CMPBconst, TypeInvalid)
|
|
v3.AddArg(y)
|
|
v3.AuxInt = 8
|
|
v3.Type = TypeFlags
|
|
v2.AddArg(v3)
|
|
v1.AddArg(v2)
|
|
v0.AddArg(v1)
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end6453a48c573d0dc7c8b0163a266c6218
|
|
end6453a48c573d0dc7c8b0163a266c6218:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (SARBconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto end3bf3d17717aa6c04462e56d1c87902ce
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SARBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end3bf3d17717aa6c04462e56d1c87902ce
|
|
end3bf3d17717aa6c04462e56d1c87902ce:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARBconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [d>>uint64(c)])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end06e0e38775f0650ed672427d19cd8fff
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d >> uint64(c)
|
|
return true
|
|
}
|
|
goto end06e0e38775f0650ed672427d19cd8fff
|
|
end06e0e38775f0650ed672427d19cd8fff:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (SARLconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto ende586a72c1b232ee0b63e37c71eeb8470
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SARLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto ende586a72c1b232ee0b63e37c71eeb8470
|
|
ende586a72c1b232ee0b63e37c71eeb8470:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARLconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [d>>uint64(c)])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end8f34dc94323303e75b7bcc8e731cf1db
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d >> uint64(c)
|
|
return true
|
|
}
|
|
goto end8f34dc94323303e75b7bcc8e731cf1db
|
|
end8f34dc94323303e75b7bcc8e731cf1db:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARQ x (MOVQconst [c]))
|
|
// cond:
|
|
// result: (SARQconst [c&63] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end25e720ab203be2745dded5550e6d8a7c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SARQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 63
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end25e720ab203be2745dded5550e6d8a7c
|
|
end25e720ab203be2745dded5550e6d8a7c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [d>>uint64(c)])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto endd949ba69a1ff71ba62c49b39c68f269e
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d >> uint64(c)
|
|
return true
|
|
}
|
|
goto endd949ba69a1ff71ba62c49b39c68f269e
|
|
endd949ba69a1ff71ba62c49b39c68f269e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (SARWconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto endc46e3f211f94238f9a0aec3c498af490
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SARWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endc46e3f211f94238f9a0aec3c498af490
|
|
endc46e3f211f94238f9a0aec3c498af490:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SARWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SARWconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [d>>uint64(c)])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto endca23e80dba22ab574f843c7a4cef24ab
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d >> uint64(c)
|
|
return true
|
|
}
|
|
goto endca23e80dba22ab574f843c7a4cef24ab
|
|
endca23e80dba22ab574f843c7a4cef24ab:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SBBLcarrymask(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SBBLcarrymask (FlagEQ))
|
|
// cond:
|
|
// result: (MOVLconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end49bb4f49864044e2cd06c9c8e2c05f12
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end49bb4f49864044e2cd06c9c8e2c05f12
|
|
end49bb4f49864044e2cd06c9c8e2c05f12:
|
|
;
|
|
// match: (SBBLcarrymask (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVLconst [-1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto ende534d42c655e8b95b051e7ec44d4fdf9
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto ende534d42c655e8b95b051e7ec44d4fdf9
|
|
ende534d42c655e8b95b051e7ec44d4fdf9:
|
|
;
|
|
// match: (SBBLcarrymask (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVLconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end212628069f217f165eaf49dcfd9e8c76
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end212628069f217f165eaf49dcfd9e8c76
|
|
end212628069f217f165eaf49dcfd9e8c76:
|
|
;
|
|
// match: (SBBLcarrymask (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVLconst [-1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end4df0bf7db9772a6011ed89bd3ce95f1d
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto end4df0bf7db9772a6011ed89bd3ce95f1d
|
|
end4df0bf7db9772a6011ed89bd3ce95f1d:
|
|
;
|
|
// match: (SBBLcarrymask (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVLconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end4d9d1509d6d260332f0a345332ce89e2
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end4d9d1509d6d260332f0a345332ce89e2
|
|
end4d9d1509d6d260332f0a345332ce89e2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SBBQcarrymask(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SBBQcarrymask (FlagEQ))
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end6b4a6f105b53df8063846a528bab0abb
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end6b4a6f105b53df8063846a528bab0abb
|
|
end6b4a6f105b53df8063846a528bab0abb:
|
|
;
|
|
// match: (SBBQcarrymask (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVQconst [-1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto endbfed0a1a93d6d8570f304898550d9558
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto endbfed0a1a93d6d8570f304898550d9558
|
|
endbfed0a1a93d6d8570f304898550d9558:
|
|
;
|
|
// match: (SBBQcarrymask (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end8edf88458891c571a6ea6e52e0267b40
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end8edf88458891c571a6ea6e52e0267b40
|
|
end8edf88458891c571a6ea6e52e0267b40:
|
|
;
|
|
// match: (SBBQcarrymask (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVQconst [-1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end4663340439f2fa7a666e81f0ebc68436
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -1
|
|
return true
|
|
}
|
|
goto end4663340439f2fa7a666e81f0ebc68436
|
|
end4663340439f2fa7a666e81f0ebc68436:
|
|
;
|
|
// match: (SBBQcarrymask (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end7262400b0380a163bd65b88e0c3db985
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end7262400b0380a163bd65b88e0c3db985
|
|
end7262400b0380a163bd65b88e0c3db985:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETA(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETA (InvertFlags x))
|
|
// cond:
|
|
// result: (SETB x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto enda4ac36e94fc279d762b5a6c7c6cc665d
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda4ac36e94fc279d762b5a6c7c6cc665d
|
|
enda4ac36e94fc279d762b5a6c7c6cc665d:
|
|
;
|
|
// match: (SETA (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end1521942d06b7f0caba92883aee0bb90e
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end1521942d06b7f0caba92883aee0bb90e
|
|
end1521942d06b7f0caba92883aee0bb90e:
|
|
;
|
|
// match: (SETA (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto endf79d69b18a140d5c6669216ad65f60f0
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endf79d69b18a140d5c6669216ad65f60f0
|
|
endf79d69b18a140d5c6669216ad65f60f0:
|
|
;
|
|
// match: (SETA (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end272c1e5fca714e319fb1c335023826db
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end272c1e5fca714e319fb1c335023826db
|
|
end272c1e5fca714e319fb1c335023826db:
|
|
;
|
|
// match: (SETA (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto ende0cf0104de1315266d93ded9a092302c
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto ende0cf0104de1315266d93ded9a092302c
|
|
ende0cf0104de1315266d93ded9a092302c:
|
|
;
|
|
// match: (SETA (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end85507f7549319577f9994826ee379f3b
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end85507f7549319577f9994826ee379f3b
|
|
end85507f7549319577f9994826ee379f3b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETAE(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETAE (InvertFlags x))
|
|
// cond:
|
|
// result: (SETBE x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto end0468f5be6caf682fdea6b91d6648991e
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETBE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0468f5be6caf682fdea6b91d6648991e
|
|
end0468f5be6caf682fdea6b91d6648991e:
|
|
;
|
|
// match: (SETAE (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto endc6396df3825db703a99be0e624c6396f
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto endc6396df3825db703a99be0e624c6396f
|
|
endc6396df3825db703a99be0e624c6396f:
|
|
;
|
|
// match: (SETAE (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto end2392c77d6746969c65a422c68ad193bc
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end2392c77d6746969c65a422c68ad193bc
|
|
end2392c77d6746969c65a422c68ad193bc:
|
|
;
|
|
// match: (SETAE (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end081f3b2b98d3a990739d2a5562d4f254
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end081f3b2b98d3a990739d2a5562d4f254
|
|
end081f3b2b98d3a990739d2a5562d4f254:
|
|
;
|
|
// match: (SETAE (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end47a6cc5efdd00e349c5e23be3624d719
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end47a6cc5efdd00e349c5e23be3624d719
|
|
end47a6cc5efdd00e349c5e23be3624d719:
|
|
;
|
|
// match: (SETAE (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto endd47bb51035b00c560b5347b3be19e20e
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto endd47bb51035b00c560b5347b3be19e20e
|
|
endd47bb51035b00c560b5347b3be19e20e:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETB (InvertFlags x))
|
|
// cond:
|
|
// result: (SETA x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto endc9eba7aa1e54a228570d2f5cc96f3565
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETA
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endc9eba7aa1e54a228570d2f5cc96f3565
|
|
endc9eba7aa1e54a228570d2f5cc96f3565:
|
|
;
|
|
// match: (SETB (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto endaf8a2c61689b00c8ad90dd090e634c81
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endaf8a2c61689b00c8ad90dd090e634c81
|
|
endaf8a2c61689b00c8ad90dd090e634c81:
|
|
;
|
|
// match: (SETB (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto endab96387d5f049ab9c87863473a5d6510
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto endab96387d5f049ab9c87863473a5d6510
|
|
endab96387d5f049ab9c87863473a5d6510:
|
|
;
|
|
// match: (SETB (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto endbf7af56278add8851974cd1a538b3b7f
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endbf7af56278add8851974cd1a538b3b7f
|
|
endbf7af56278add8851974cd1a538b3b7f:
|
|
;
|
|
// match: (SETB (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end2d07a10db28e5160fccf66ee44c4823e
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end2d07a10db28e5160fccf66ee44c4823e
|
|
end2d07a10db28e5160fccf66ee44c4823e:
|
|
;
|
|
// match: (SETB (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end87ec5187683c0ee498c0a2c4de59f4c0
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end87ec5187683c0ee498c0a2c4de59f4c0
|
|
end87ec5187683c0ee498c0a2c4de59f4c0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETBE(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETBE (InvertFlags x))
|
|
// cond:
|
|
// result: (SETAE x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto end9d9031643469798b14b8cad1f5a7a1ba
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETAE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end9d9031643469798b14b8cad1f5a7a1ba
|
|
end9d9031643469798b14b8cad1f5a7a1ba:
|
|
;
|
|
// match: (SETBE (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto ende6a02d3ce0e1584e806c7861de97eb5b
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto ende6a02d3ce0e1584e806c7861de97eb5b
|
|
ende6a02d3ce0e1584e806c7861de97eb5b:
|
|
;
|
|
// match: (SETBE (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto end7ea0208cd10e6311655d09e8aa354169
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end7ea0208cd10e6311655d09e8aa354169
|
|
end7ea0208cd10e6311655d09e8aa354169:
|
|
;
|
|
// match: (SETBE (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto enddbfa0595802c67348d3a3bd22b198231
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto enddbfa0595802c67348d3a3bd22b198231
|
|
enddbfa0595802c67348d3a3bd22b198231:
|
|
;
|
|
// match: (SETBE (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end5b26e1d28d6a517ed004b0f9b80df27b
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end5b26e1d28d6a517ed004b0f9b80df27b
|
|
end5b26e1d28d6a517ed004b0f9b80df27b:
|
|
;
|
|
// match: (SETBE (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end679e2e0ccd0dd526ea781fc64102cb88
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end679e2e0ccd0dd526ea781fc64102cb88
|
|
end679e2e0ccd0dd526ea781fc64102cb88:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETEQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETEQ (InvertFlags x))
|
|
// cond:
|
|
// result: (SETEQ x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto end5d2039c9368d8c0cfba23b5a85b459e1
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETEQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end5d2039c9368d8c0cfba23b5a85b459e1
|
|
end5d2039c9368d8c0cfba23b5a85b459e1:
|
|
;
|
|
// match: (SETEQ (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end74e09087ca9d4bdf7740f4f052d2b9d3
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end74e09087ca9d4bdf7740f4f052d2b9d3
|
|
end74e09087ca9d4bdf7740f4f052d2b9d3:
|
|
;
|
|
// match: (SETEQ (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto ende5d3756d09e616648de68d364b2c308f
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto ende5d3756d09e616648de68d364b2c308f
|
|
ende5d3756d09e616648de68d364b2c308f:
|
|
;
|
|
// match: (SETEQ (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end1a86a603a5c6e0f328f63b9279137bcc
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end1a86a603a5c6e0f328f63b9279137bcc
|
|
end1a86a603a5c6e0f328f63b9279137bcc:
|
|
;
|
|
// match: (SETEQ (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto endbf907332cd6004c73b88f43b5e20275f
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endbf907332cd6004c73b88f43b5e20275f
|
|
endbf907332cd6004c73b88f43b5e20275f:
|
|
;
|
|
// match: (SETEQ (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end707540a9904307c186884f60e425ca62
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end707540a9904307c186884f60e425ca62
|
|
end707540a9904307c186884f60e425ca62:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETG(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETG (InvertFlags x))
|
|
// cond:
|
|
// result: (SETL x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto endf7586738694c9cd0b74ae28bbadb649f
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endf7586738694c9cd0b74ae28bbadb649f
|
|
endf7586738694c9cd0b74ae28bbadb649f:
|
|
;
|
|
// match: (SETG (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto endc952db8883f26126822bac29276b0690
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endc952db8883f26126822bac29276b0690
|
|
endc952db8883f26126822bac29276b0690:
|
|
;
|
|
// match: (SETG (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto end3b6d659c9285d30eba022a85c6c6f1c9
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end3b6d659c9285d30eba022a85c6c6f1c9
|
|
end3b6d659c9285d30eba022a85c6c6f1c9:
|
|
;
|
|
// match: (SETG (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end2eabfc908ca06e7d5d217142dd48af33
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end2eabfc908ca06e7d5d217142dd48af33
|
|
end2eabfc908ca06e7d5d217142dd48af33:
|
|
;
|
|
// match: (SETG (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end7c059e63a98776c77bb8e43759d2d864
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end7c059e63a98776c77bb8e43759d2d864
|
|
end7c059e63a98776c77bb8e43759d2d864:
|
|
;
|
|
// match: (SETG (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto enddcb3196491c82060bcb90da722ffa8bd
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto enddcb3196491c82060bcb90da722ffa8bd
|
|
enddcb3196491c82060bcb90da722ffa8bd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETGE(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETGE (InvertFlags x))
|
|
// cond:
|
|
// result: (SETLE x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto end82c11eff6f842159f564f2dad3d2eedc
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETLE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end82c11eff6f842159f564f2dad3d2eedc
|
|
end82c11eff6f842159f564f2dad3d2eedc:
|
|
;
|
|
// match: (SETGE (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end1152b03b15fb4ea1822b2cc1c6815887
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end1152b03b15fb4ea1822b2cc1c6815887
|
|
end1152b03b15fb4ea1822b2cc1c6815887:
|
|
;
|
|
// match: (SETGE (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto endd55763184b306cc32397b421df6fc994
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endd55763184b306cc32397b421df6fc994
|
|
endd55763184b306cc32397b421df6fc994:
|
|
;
|
|
// match: (SETGE (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end209fbc531c4d6696b0b226c1ac016add
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end209fbc531c4d6696b0b226c1ac016add
|
|
end209fbc531c4d6696b0b226c1ac016add:
|
|
;
|
|
// match: (SETGE (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end41600cc6b5af1497fc534af49eaf60a2
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end41600cc6b5af1497fc534af49eaf60a2
|
|
end41600cc6b5af1497fc534af49eaf60a2:
|
|
;
|
|
// match: (SETGE (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto endaa33fb1204dba90a141a9a945a9643a2
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto endaa33fb1204dba90a141a9a945a9643a2
|
|
endaa33fb1204dba90a141a9a945a9643a2:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETL (InvertFlags x))
|
|
// cond:
|
|
// result: (SETG x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto ende33160cd86b9d4d3b77e02fb4658d5d3
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETG
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto ende33160cd86b9d4d3b77e02fb4658d5d3
|
|
ende33160cd86b9d4d3b77e02fb4658d5d3:
|
|
;
|
|
// match: (SETL (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end52e421ca76fa5dfba6b9bc35b220c0bf
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end52e421ca76fa5dfba6b9bc35b220c0bf
|
|
end52e421ca76fa5dfba6b9bc35b220c0bf:
|
|
;
|
|
// match: (SETL (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto end4d9781536010887bcf6f6ffd563e6aac
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end4d9781536010887bcf6f6ffd563e6aac
|
|
end4d9781536010887bcf6f6ffd563e6aac:
|
|
;
|
|
// match: (SETL (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto end9d0dd525ca800cb3ec73e94d60c3cbf1
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end9d0dd525ca800cb3ec73e94d60c3cbf1
|
|
end9d0dd525ca800cb3ec73e94d60c3cbf1:
|
|
;
|
|
// match: (SETL (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end6d77da1539ee0ebebee0e162c55e8f6e
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end6d77da1539ee0ebebee0e162c55e8f6e
|
|
end6d77da1539ee0ebebee0e162c55e8f6e:
|
|
;
|
|
// match: (SETL (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end6c129bef0cc197325a338d17720516d1
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end6c129bef0cc197325a338d17720516d1
|
|
end6c129bef0cc197325a338d17720516d1:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETLE(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETLE (InvertFlags x))
|
|
// cond:
|
|
// result: (SETGE x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto end9307d96753efbeb888d1c98a6aba7a29
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETGE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end9307d96753efbeb888d1c98a6aba7a29
|
|
end9307d96753efbeb888d1c98a6aba7a29:
|
|
;
|
|
// match: (SETLE (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end43f998d2f9524fcdf45bab9fe672aa7c
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end43f998d2f9524fcdf45bab9fe672aa7c
|
|
end43f998d2f9524fcdf45bab9fe672aa7c:
|
|
;
|
|
// match: (SETLE (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto end80212f1ca6a01bccdf4bbd5aa15d5aab
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end80212f1ca6a01bccdf4bbd5aa15d5aab
|
|
end80212f1ca6a01bccdf4bbd5aa15d5aab:
|
|
;
|
|
// match: (SETLE (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto endd5ab2a8df7344cd7c8e1092d78bfd871
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto endd5ab2a8df7344cd7c8e1092d78bfd871
|
|
endd5ab2a8df7344cd7c8e1092d78bfd871:
|
|
;
|
|
// match: (SETLE (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto enda74997e85c6f82ff1c530e6051d01e21
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto enda74997e85c6f82ff1c530e6051d01e21
|
|
enda74997e85c6f82ff1c530e6051d01e21:
|
|
;
|
|
// match: (SETLE (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end7694b41632545d10fcc6339063c53f07
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end7694b41632545d10fcc6339063c53f07
|
|
end7694b41632545d10fcc6339063c53f07:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SETNE(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SETNE (InvertFlags x))
|
|
// cond:
|
|
// result: (SETNE x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64InvertFlags {
|
|
goto endbc71811b789475308014550f638026eb
|
|
}
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64SETNE
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endbc71811b789475308014550f638026eb
|
|
endbc71811b789475308014550f638026eb:
|
|
;
|
|
// match: (SETNE (FlagEQ))
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagEQ {
|
|
goto end6b66ea2ed518a926a071fe0d3dce46d8
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end6b66ea2ed518a926a071fe0d3dce46d8
|
|
end6b66ea2ed518a926a071fe0d3dce46d8:
|
|
;
|
|
// match: (SETNE (FlagLT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_ULT {
|
|
goto ende4d3b99f9dff014be3067a577ba0b016
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto ende4d3b99f9dff014be3067a577ba0b016
|
|
ende4d3b99f9dff014be3067a577ba0b016:
|
|
;
|
|
// match: (SETNE (FlagLT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagLT_UGT {
|
|
goto endb98d73ed6e5d3d21c2ea33840ab2a21c
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto endb98d73ed6e5d3d21c2ea33840ab2a21c
|
|
endb98d73ed6e5d3d21c2ea33840ab2a21c:
|
|
;
|
|
// match: (SETNE (FlagGT_ULT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_ULT {
|
|
goto end3bceb5cece8d0112cc8cd53435d64ef4
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end3bceb5cece8d0112cc8cd53435d64ef4
|
|
end3bceb5cece8d0112cc8cd53435d64ef4:
|
|
;
|
|
// match: (SETNE (FlagGT_UGT))
|
|
// cond:
|
|
// result: (MOVBconst [1])
|
|
{
|
|
if v.Args[0].Op != OpAMD64FlagGT_UGT {
|
|
goto end9249b3ed3e1e582dd5435fb73cbc13ac
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 1
|
|
return true
|
|
}
|
|
goto end9249b3ed3e1e582dd5435fb73cbc13ac
|
|
end9249b3ed3e1e582dd5435fb73cbc13ac:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHLB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHLB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (SHLBconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto end2d0d0111d831d8a575b5627284a6337a
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHLBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end2d0d0111d831d8a575b5627284a6337a
|
|
end2d0d0111d831d8a575b5627284a6337a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHLL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHLL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (SHLLconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end633f9ddcfbb63374c895a5f78da75d25
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHLLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end633f9ddcfbb63374c895a5f78da75d25
|
|
end633f9ddcfbb63374c895a5f78da75d25:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHLQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHLQ x (MOVQconst [c]))
|
|
// cond:
|
|
// result: (SHLQconst [c&63] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end4d7e3a945cacdd6b6c8c0de6f465d4ae
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHLQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 63
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end4d7e3a945cacdd6b6c8c0de6f465d4ae
|
|
end4d7e3a945cacdd6b6c8c0de6f465d4ae:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHLW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHLW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (SHLWconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto endba96a52aa58d28b3357828051e0e695c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHLWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endba96a52aa58d28b3357828051e0e695c
|
|
endba96a52aa58d28b3357828051e0e695c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHRB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHRB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (SHRBconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto enddb1cd5aaa826d43fa4f6d1b2b8795e58
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHRBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enddb1cd5aaa826d43fa4f6d1b2b8795e58
|
|
enddb1cd5aaa826d43fa4f6d1b2b8795e58:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHRL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHRL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (SHRLconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end344b8b9202e1925e8d0561f1c21412fc
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHRLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end344b8b9202e1925e8d0561f1c21412fc
|
|
end344b8b9202e1925e8d0561f1c21412fc:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHRQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHRQ x (MOVQconst [c]))
|
|
// cond:
|
|
// result: (SHRQconst [c&63] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end699d35e2d5cfa08b8a3b1c8a183ddcf3
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHRQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 63
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end699d35e2d5cfa08b8a3b1c8a183ddcf3
|
|
end699d35e2d5cfa08b8a3b1c8a183ddcf3:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SHRW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SHRW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (SHRWconst [c&31] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto endd75ff1f9b3e9ec9c942a39b6179da1b3
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SHRWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c & 31
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd75ff1f9b3e9ec9c942a39b6179da1b3
|
|
endd75ff1f9b3e9ec9c942a39b6179da1b3:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (SUBBconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto end9ca5d2a70e2df1a5a3ed6786bce1f7b2
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SUBBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end9ca5d2a70e2df1a5a3ed6786bce1f7b2
|
|
end9ca5d2a70e2df1a5a3ed6786bce1f7b2:
|
|
;
|
|
// match: (SUBB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (NEGB (SUBBconst <v.Type> x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endc288755d69b04d24a6aac32a73956411
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64NEGB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SUBBconst, TypeInvalid)
|
|
v0.Type = v.Type
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endc288755d69b04d24a6aac32a73956411
|
|
endc288755d69b04d24a6aac32a73956411:
|
|
;
|
|
// match: (SUBB x x)
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto ende8904403d937d95b0d6133d3ec92bb45
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto ende8904403d937d95b0d6133d3ec92bb45
|
|
ende8904403d937d95b0d6133d3ec92bb45:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBBconst [c] x)
|
|
// cond: int8(c) == 0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int8(c) == 0) {
|
|
goto end974a26e947badc62fc104581f49138e6
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end974a26e947badc62fc104581f49138e6
|
|
end974a26e947badc62fc104581f49138e6:
|
|
;
|
|
// match: (SUBBconst [c] (MOVBconst [d]))
|
|
// cond:
|
|
// result: (MOVBconst [d-c])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto enddc5383558e2f3eae507afcb94eada964
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d - c
|
|
return true
|
|
}
|
|
goto enddc5383558e2f3eae507afcb94eada964
|
|
enddc5383558e2f3eae507afcb94eada964:
|
|
;
|
|
// match: (SUBBconst [c] (SUBBconst [d] x))
|
|
// cond:
|
|
// result: (ADDBconst [-c-d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64SUBBconst {
|
|
goto end035c57413a46eb347ecb3736d1510915
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c - d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end035c57413a46eb347ecb3736d1510915
|
|
end035c57413a46eb347ecb3736d1510915:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (SUBLconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto end178c1d6c86f9c16f6497586c2f7d8625
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SUBLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end178c1d6c86f9c16f6497586c2f7d8625
|
|
end178c1d6c86f9c16f6497586c2f7d8625:
|
|
;
|
|
// match: (SUBL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (NEGL (SUBLconst <v.Type> x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto endb0efe6e15ec20486b849534a00483ae2
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64NEGL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SUBLconst, TypeInvalid)
|
|
v0.Type = v.Type
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endb0efe6e15ec20486b849534a00483ae2
|
|
endb0efe6e15ec20486b849534a00483ae2:
|
|
;
|
|
// match: (SUBL x x)
|
|
// cond:
|
|
// result: (MOVLconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end332f1f641f875c69bea7289191e69133
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end332f1f641f875c69bea7289191e69133
|
|
end332f1f641f875c69bea7289191e69133:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBLconst [c] x)
|
|
// cond: int32(c) == 0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int32(c) == 0) {
|
|
goto end3fa10eaa42f9e283cf1757e1b2d3cac2
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end3fa10eaa42f9e283cf1757e1b2d3cac2
|
|
end3fa10eaa42f9e283cf1757e1b2d3cac2:
|
|
;
|
|
// match: (SUBLconst [c] (MOVLconst [d]))
|
|
// cond:
|
|
// result: (MOVLconst [d-c])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end6c5c6d58d4bdd0a5c2f7bf10b343b41e
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d - c
|
|
return true
|
|
}
|
|
goto end6c5c6d58d4bdd0a5c2f7bf10b343b41e
|
|
end6c5c6d58d4bdd0a5c2f7bf10b343b41e:
|
|
;
|
|
// match: (SUBLconst [c] (SUBLconst [d] x))
|
|
// cond:
|
|
// result: (ADDLconst [-c-d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64SUBLconst {
|
|
goto end0c9ffb11e8a56ced1b14dbf6bf9a6737
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c - d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0c9ffb11e8a56ced1b14dbf6bf9a6737
|
|
end0c9ffb11e8a56ced1b14dbf6bf9a6737:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (SUBQconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end9bbb7b20824a498752c605942fad89c2
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto end9bbb7b20824a498752c605942fad89c2
|
|
}
|
|
v.Op = OpAMD64SUBQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end9bbb7b20824a498752c605942fad89c2
|
|
end9bbb7b20824a498752c605942fad89c2:
|
|
;
|
|
// match: (SUBQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (NEGQ (SUBQconst <v.Type> x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end8beb96de3efee9206d1bd4b7d777d2cb
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto end8beb96de3efee9206d1bd4b7d777d2cb
|
|
}
|
|
v.Op = OpAMD64NEGQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SUBQconst, TypeInvalid)
|
|
v0.Type = v.Type
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end8beb96de3efee9206d1bd4b7d777d2cb
|
|
end8beb96de3efee9206d1bd4b7d777d2cb:
|
|
;
|
|
// match: (SUBQ x x)
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto endd87d1d839d2dc54d9c90fa4f73383480
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endd87d1d839d2dc54d9c90fa4f73383480
|
|
endd87d1d839d2dc54d9c90fa4f73383480:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBQconst [0] x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto endfce1d3cec7c543c9dd80a27d944eb09e
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endfce1d3cec7c543c9dd80a27d944eb09e
|
|
endfce1d3cec7c543c9dd80a27d944eb09e:
|
|
;
|
|
// match: (SUBQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [d-c])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto endb0daebe6831cf381377c3e4248070f25
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d - c
|
|
return true
|
|
}
|
|
goto endb0daebe6831cf381377c3e4248070f25
|
|
endb0daebe6831cf381377c3e4248070f25:
|
|
;
|
|
// match: (SUBQconst [c] (SUBQconst [d] x))
|
|
// cond:
|
|
// result: (ADDQconst [-c-d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64SUBQconst {
|
|
goto end2d40ddb5ae9e90679456254c61858d9d
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c - d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end2d40ddb5ae9e90679456254c61858d9d
|
|
end2d40ddb5ae9e90679456254c61858d9d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (SUBWconst x [c])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end135aa9100b2f61d58b37cede37b63731
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64SUBWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AuxInt = c
|
|
return true
|
|
}
|
|
goto end135aa9100b2f61d58b37cede37b63731
|
|
end135aa9100b2f61d58b37cede37b63731:
|
|
;
|
|
// match: (SUBW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (NEGW (SUBWconst <v.Type> x [c]))
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end44d23f7e65a4b1c42d0e6463f8e493b6
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64NEGW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v0 := b.NewValue0(v.Line, OpAMD64SUBWconst, TypeInvalid)
|
|
v0.Type = v.Type
|
|
v0.AddArg(x)
|
|
v0.AuxInt = c
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end44d23f7e65a4b1c42d0e6463f8e493b6
|
|
end44d23f7e65a4b1c42d0e6463f8e493b6:
|
|
;
|
|
// match: (SUBW x x)
|
|
// cond:
|
|
// result: (MOVWconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto endb970e7c318d04a1afe1dfe08a7ca0d9c
|
|
}
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto endb970e7c318d04a1afe1dfe08a7ca0d9c
|
|
endb970e7c318d04a1afe1dfe08a7ca0d9c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64SUBWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SUBWconst [c] x)
|
|
// cond: int16(c) == 0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int16(c) == 0) {
|
|
goto end1e7a493992465c9cc8314e3256ed6394
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1e7a493992465c9cc8314e3256ed6394
|
|
end1e7a493992465c9cc8314e3256ed6394:
|
|
;
|
|
// match: (SUBWconst [c] (MOVWconst [d]))
|
|
// cond:
|
|
// result: (MOVWconst [d-c])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto endae629a229c399eaed7dbb95b1b0e6f8a
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = d - c
|
|
return true
|
|
}
|
|
goto endae629a229c399eaed7dbb95b1b0e6f8a
|
|
endae629a229c399eaed7dbb95b1b0e6f8a:
|
|
;
|
|
// match: (SUBWconst [c] (SUBWconst [d] x))
|
|
// cond:
|
|
// result: (ADDWconst [-c-d] x)
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64SUBWconst {
|
|
goto enda59f08d12aa08717b0443b7bb1b71374
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
x := v.Args[0].Args[0]
|
|
v.Op = OpAMD64ADDWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = -c - d
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda59f08d12aa08717b0443b7bb1b71374
|
|
enda59f08d12aa08717b0443b7bb1b71374:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSignExt16to32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SignExt16to32 x)
|
|
// cond:
|
|
// result: (MOVWQSX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVWQSX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end21e4271c2b48a5aa3561ccfa8fa67cd9
|
|
end21e4271c2b48a5aa3561ccfa8fa67cd9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSignExt16to64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SignExt16to64 x)
|
|
// cond:
|
|
// result: (MOVWQSX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVWQSX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endc6d242ee3a3e195ef0f9e8dae47ada75
|
|
endc6d242ee3a3e195ef0f9e8dae47ada75:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSignExt32to64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SignExt32to64 x)
|
|
// cond:
|
|
// result: (MOVLQSX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVLQSX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endb9f1a8b2d01eee44964a71a01bca165c
|
|
endb9f1a8b2d01eee44964a71a01bca165c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSignExt8to16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SignExt8to16 x)
|
|
// cond:
|
|
// result: (MOVBQSX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVBQSX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end372869f08e147404b80634e5f83fd506
|
|
end372869f08e147404b80634e5f83fd506:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSignExt8to32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SignExt8to32 x)
|
|
// cond:
|
|
// result: (MOVBQSX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVBQSX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end913e3575e5b4cf7f60585c108db40464
|
|
end913e3575e5b4cf7f60585c108db40464:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSignExt8to64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SignExt8to64 x)
|
|
// cond:
|
|
// result: (MOVBQSX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVBQSX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endcef6d6001d3f25cf5dacee11a46e5c8c
|
|
endcef6d6001d3f25cf5dacee11a46e5c8c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSqrt(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sqrt x)
|
|
// cond:
|
|
// result: (SQRTSD x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64SQRTSD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end72f79ca9ec139e15856aaa03338cf543
|
|
end72f79ca9ec139e15856aaa03338cf543:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpStaticCall(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (StaticCall [argwid] {target} mem)
|
|
// cond:
|
|
// result: (CALLstatic [argwid] {target} mem)
|
|
{
|
|
argwid := v.AuxInt
|
|
target := v.Aux
|
|
mem := v.Args[0]
|
|
v.Op = OpAMD64CALLstatic
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = argwid
|
|
v.Aux = target
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end32c5cbec813d1c2ae94fc9b1090e4b2a
|
|
end32c5cbec813d1c2ae94fc9b1090e4b2a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpStore(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Store [8] ptr val mem)
|
|
// cond: is64BitFloat(val.Type)
|
|
// result: (MOVSDstore ptr val mem)
|
|
{
|
|
if v.AuxInt != 8 {
|
|
goto endaeec4f61bc8e67dbf3fa2f79fe4c2b9e
|
|
}
|
|
ptr := v.Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(is64BitFloat(val.Type)) {
|
|
goto endaeec4f61bc8e67dbf3fa2f79fe4c2b9e
|
|
}
|
|
v.Op = OpAMD64MOVSDstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endaeec4f61bc8e67dbf3fa2f79fe4c2b9e
|
|
endaeec4f61bc8e67dbf3fa2f79fe4c2b9e:
|
|
;
|
|
// match: (Store [4] ptr val mem)
|
|
// cond: is32BitFloat(val.Type)
|
|
// result: (MOVSSstore ptr val mem)
|
|
{
|
|
if v.AuxInt != 4 {
|
|
goto endf638ca0a75871b5062da15324d0e0384
|
|
}
|
|
ptr := v.Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
if !(is32BitFloat(val.Type)) {
|
|
goto endf638ca0a75871b5062da15324d0e0384
|
|
}
|
|
v.Op = OpAMD64MOVSSstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endf638ca0a75871b5062da15324d0e0384
|
|
endf638ca0a75871b5062da15324d0e0384:
|
|
;
|
|
// match: (Store [8] ptr val mem)
|
|
// cond:
|
|
// result: (MOVQstore ptr val mem)
|
|
{
|
|
if v.AuxInt != 8 {
|
|
goto endd1eb7c3ea0c806e7a53ff3be86186eb7
|
|
}
|
|
ptr := v.Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVQstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endd1eb7c3ea0c806e7a53ff3be86186eb7
|
|
endd1eb7c3ea0c806e7a53ff3be86186eb7:
|
|
;
|
|
// match: (Store [4] ptr val mem)
|
|
// cond:
|
|
// result: (MOVLstore ptr val mem)
|
|
{
|
|
if v.AuxInt != 4 {
|
|
goto end44e3b22360da76ecd59be9a8c2dd1347
|
|
}
|
|
ptr := v.Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVLstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end44e3b22360da76ecd59be9a8c2dd1347
|
|
end44e3b22360da76ecd59be9a8c2dd1347:
|
|
;
|
|
// match: (Store [2] ptr val mem)
|
|
// cond:
|
|
// result: (MOVWstore ptr val mem)
|
|
{
|
|
if v.AuxInt != 2 {
|
|
goto endd0342b7fd3d0713f3e26922660047c71
|
|
}
|
|
ptr := v.Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVWstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endd0342b7fd3d0713f3e26922660047c71
|
|
endd0342b7fd3d0713f3e26922660047c71:
|
|
;
|
|
// match: (Store [1] ptr val mem)
|
|
// cond:
|
|
// result: (MOVBstore ptr val mem)
|
|
{
|
|
if v.AuxInt != 1 {
|
|
goto end8e76e20031197ca875889d2b4d0eb1d1
|
|
}
|
|
ptr := v.Args[0]
|
|
val := v.Args[1]
|
|
mem := v.Args[2]
|
|
v.Op = OpAMD64MOVBstore
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(ptr)
|
|
v.AddArg(val)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end8e76e20031197ca875889d2b4d0eb1d1
|
|
end8e76e20031197ca875889d2b4d0eb1d1:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSub16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sub16 x y)
|
|
// cond:
|
|
// result: (SUBW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end54adc5de883c0460ca71c6ee464d4244
|
|
end54adc5de883c0460ca71c6ee464d4244:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSub32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sub32 x y)
|
|
// cond:
|
|
// result: (SUBL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto enddc3a2a488bda8c5856f93343e5ffe5f8
|
|
enddc3a2a488bda8c5856f93343e5ffe5f8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSub32F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sub32F x y)
|
|
// cond:
|
|
// result: (SUBSS x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBSS
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end20193c1804b0e707702a884fb8abd60d
|
|
end20193c1804b0e707702a884fb8abd60d:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSub64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sub64 x y)
|
|
// cond:
|
|
// result: (SUBQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endd88d5646309fd9174584888ecc8aca2c
|
|
endd88d5646309fd9174584888ecc8aca2c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSub64F(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sub64F x y)
|
|
// cond:
|
|
// result: (SUBSD x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBSD
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end5d5af7b8a3326bf9151f00a0013b73d7
|
|
end5d5af7b8a3326bf9151f00a0013b73d7:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSub8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Sub8 x y)
|
|
// cond:
|
|
// result: (SUBB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end7d33bf9bdfa505f96b930563eca7955f
|
|
end7d33bf9bdfa505f96b930563eca7955f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpSubPtr(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (SubPtr x y)
|
|
// cond:
|
|
// result: (SUBQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64SUBQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end748f63f755afe0b97a8f3cf7e4d9cbfe
|
|
end748f63f755afe0b97a8f3cf7e4d9cbfe:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpTrunc16to8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Trunc16to8 x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end8e2f5e0a6e3a06423c077747de6c2bdd
|
|
end8e2f5e0a6e3a06423c077747de6c2bdd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpTrunc32to16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Trunc32to16 x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end5bed0e3a3c1c6374d86beb5a4397708c
|
|
end5bed0e3a3c1c6374d86beb5a4397708c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpTrunc32to8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Trunc32to8 x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endef0b8032ce91979ce6cd0004260c04ee
|
|
endef0b8032ce91979ce6cd0004260c04ee:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpTrunc64to16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Trunc64to16 x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd32fd6e0ce970c212835e6f71c3dcbfd
|
|
endd32fd6e0ce970c212835e6f71c3dcbfd:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpTrunc64to32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Trunc64to32 x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end1212c4e84153210aff7fd630fb3e1883
|
|
end1212c4e84153210aff7fd630fb3e1883:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpTrunc64to8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Trunc64to8 x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end734f017d4b2810ca2288f7037365824c
|
|
end734f017d4b2810ca2288f7037365824c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORB(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORB x (MOVBconst [c]))
|
|
// cond:
|
|
// result: (XORBconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVBconst {
|
|
goto enda9ed9fdd115ffdffa8127c007c34d7b7
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64XORBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda9ed9fdd115ffdffa8127c007c34d7b7
|
|
enda9ed9fdd115ffdffa8127c007c34d7b7:
|
|
;
|
|
// match: (XORB (MOVBconst [c]) x)
|
|
// cond:
|
|
// result: (XORBconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto endb02a07d9dc7b802c59f013116e952f3f
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64XORBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endb02a07d9dc7b802c59f013116e952f3f
|
|
endb02a07d9dc7b802c59f013116e952f3f:
|
|
;
|
|
// match: (XORB x x)
|
|
// cond:
|
|
// result: (MOVBconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end2afddc39503d04d572a3a07878f6c9c9
|
|
}
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end2afddc39503d04d572a3a07878f6c9c9
|
|
end2afddc39503d04d572a3a07878f6c9c9:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORBconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORBconst [c] x)
|
|
// cond: int8(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int8(c) == 0) {
|
|
goto end14b03b70e5579dfe3f9b243e02a887c3
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end14b03b70e5579dfe3f9b243e02a887c3
|
|
end14b03b70e5579dfe3f9b243e02a887c3:
|
|
;
|
|
// match: (XORBconst [c] (MOVBconst [d]))
|
|
// cond:
|
|
// result: (MOVBconst [c^d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVBconst {
|
|
goto end6d8d1b612af9d253605c8bc69b822903
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVBconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c ^ d
|
|
return true
|
|
}
|
|
goto end6d8d1b612af9d253605c8bc69b822903
|
|
end6d8d1b612af9d253605c8bc69b822903:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORL(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORL x (MOVLconst [c]))
|
|
// cond:
|
|
// result: (XORLconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVLconst {
|
|
goto enda9459d509d3416da67d13a22dd074a9c
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64XORLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda9459d509d3416da67d13a22dd074a9c
|
|
enda9459d509d3416da67d13a22dd074a9c:
|
|
;
|
|
// match: (XORL (MOVLconst [c]) x)
|
|
// cond:
|
|
// result: (XORLconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end9c1a0af00eeadd8aa325e55f1f3fb89c
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64XORLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end9c1a0af00eeadd8aa325e55f1f3fb89c
|
|
end9c1a0af00eeadd8aa325e55f1f3fb89c:
|
|
;
|
|
// match: (XORL x x)
|
|
// cond:
|
|
// result: (MOVLconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end7bcf9cfeb69a0d7647389124eb53ce2a
|
|
}
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end7bcf9cfeb69a0d7647389124eb53ce2a
|
|
end7bcf9cfeb69a0d7647389124eb53ce2a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORLconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORLconst [c] x)
|
|
// cond: int32(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int32(c) == 0) {
|
|
goto end99808ca9fb8e3220e42f5678e1042a08
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end99808ca9fb8e3220e42f5678e1042a08
|
|
end99808ca9fb8e3220e42f5678e1042a08:
|
|
;
|
|
// match: (XORLconst [c] (MOVLconst [d]))
|
|
// cond:
|
|
// result: (MOVLconst [c^d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVLconst {
|
|
goto end71238075b10b68a226903cc453c4715c
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVLconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c ^ d
|
|
return true
|
|
}
|
|
goto end71238075b10b68a226903cc453c4715c
|
|
end71238075b10b68a226903cc453c4715c:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORQ(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORQ x (MOVQconst [c]))
|
|
// cond: is32Bit(c)
|
|
// result: (XORQconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVQconst {
|
|
goto end452341f950062e0483f16438fb9ec500
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
if !(is32Bit(c)) {
|
|
goto end452341f950062e0483f16438fb9ec500
|
|
}
|
|
v.Op = OpAMD64XORQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end452341f950062e0483f16438fb9ec500
|
|
end452341f950062e0483f16438fb9ec500:
|
|
;
|
|
// match: (XORQ (MOVQconst [c]) x)
|
|
// cond: is32Bit(c)
|
|
// result: (XORQconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto endd221a7e3daaaaa29ee385ad36e061b57
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
if !(is32Bit(c)) {
|
|
goto endd221a7e3daaaaa29ee385ad36e061b57
|
|
}
|
|
v.Op = OpAMD64XORQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd221a7e3daaaaa29ee385ad36e061b57
|
|
endd221a7e3daaaaa29ee385ad36e061b57:
|
|
;
|
|
// match: (XORQ x x)
|
|
// cond:
|
|
// result: (MOVQconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end10575a5d711cf14e6d4dffbb0e8dfaeb
|
|
}
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end10575a5d711cf14e6d4dffbb0e8dfaeb
|
|
end10575a5d711cf14e6d4dffbb0e8dfaeb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORQconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORQconst [0] x)
|
|
// cond:
|
|
// result: x
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto end0ee8d195a97eff476cf1f69a4dc0ec75
|
|
}
|
|
x := v.Args[0]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end0ee8d195a97eff476cf1f69a4dc0ec75
|
|
end0ee8d195a97eff476cf1f69a4dc0ec75:
|
|
;
|
|
// match: (XORQconst [c] (MOVQconst [d]))
|
|
// cond:
|
|
// result: (MOVQconst [c^d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVQconst {
|
|
goto end3f404d4f07362319fbad2e1ba0827a9f
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVQconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c ^ d
|
|
return true
|
|
}
|
|
goto end3f404d4f07362319fbad2e1ba0827a9f
|
|
end3f404d4f07362319fbad2e1ba0827a9f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORW(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORW x (MOVWconst [c]))
|
|
// cond:
|
|
// result: (XORWconst [c] x)
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1].Op != OpAMD64MOVWconst {
|
|
goto end2ca109efd66c221a5691a4da95ec6c67
|
|
}
|
|
c := v.Args[1].AuxInt
|
|
v.Op = OpAMD64XORWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end2ca109efd66c221a5691a4da95ec6c67
|
|
end2ca109efd66c221a5691a4da95ec6c67:
|
|
;
|
|
// match: (XORW (MOVWconst [c]) x)
|
|
// cond:
|
|
// result: (XORWconst [c] x)
|
|
{
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto end51ee62a06d4301e5a4aed7a6639b1d53
|
|
}
|
|
c := v.Args[0].AuxInt
|
|
x := v.Args[1]
|
|
v.Op = OpAMD64XORWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end51ee62a06d4301e5a4aed7a6639b1d53
|
|
end51ee62a06d4301e5a4aed7a6639b1d53:
|
|
;
|
|
// match: (XORW x x)
|
|
// cond:
|
|
// result: (MOVWconst [0])
|
|
{
|
|
x := v.Args[0]
|
|
if v.Args[1] != x {
|
|
goto end07f332e857be0c2707797ed480a2faf4
|
|
}
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
return true
|
|
}
|
|
goto end07f332e857be0c2707797ed480a2faf4
|
|
end07f332e857be0c2707797ed480a2faf4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpAMD64XORWconst(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (XORWconst [c] x)
|
|
// cond: int16(c)==0
|
|
// result: x
|
|
{
|
|
c := v.AuxInt
|
|
x := v.Args[0]
|
|
if !(int16(c) == 0) {
|
|
goto enda371132353dee83828836da851240f0a
|
|
}
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = x.Type
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enda371132353dee83828836da851240f0a
|
|
enda371132353dee83828836da851240f0a:
|
|
;
|
|
// match: (XORWconst [c] (MOVWconst [d]))
|
|
// cond:
|
|
// result: (MOVWconst [c^d])
|
|
{
|
|
c := v.AuxInt
|
|
if v.Args[0].Op != OpAMD64MOVWconst {
|
|
goto ende24881ccdfa8486c4593fd9aa5df1ed6
|
|
}
|
|
d := v.Args[0].AuxInt
|
|
v.Op = OpAMD64MOVWconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = c ^ d
|
|
return true
|
|
}
|
|
goto ende24881ccdfa8486c4593fd9aa5df1ed6
|
|
ende24881ccdfa8486c4593fd9aa5df1ed6:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpXor16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Xor16 x y)
|
|
// cond:
|
|
// result: (XORW x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64XORW
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end20efdd5dfd5130abf818de5546a991a0
|
|
end20efdd5dfd5130abf818de5546a991a0:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpXor32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Xor32 x y)
|
|
// cond:
|
|
// result: (XORL x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64XORL
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end9da6bce98b437e2609488346116a75d8
|
|
end9da6bce98b437e2609488346116a75d8:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpXor64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Xor64 x y)
|
|
// cond:
|
|
// result: (XORQ x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64XORQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto endc88cd189c2a6f07ecff324ed94809f8f
|
|
endc88cd189c2a6f07ecff324ed94809f8f:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpXor8(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Xor8 x y)
|
|
// cond:
|
|
// result: (XORB x y)
|
|
{
|
|
x := v.Args[0]
|
|
y := v.Args[1]
|
|
v.Op = OpAMD64XORB
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
v.AddArg(y)
|
|
return true
|
|
}
|
|
goto end50f4434ef96916d3e65ad3cc236d1723
|
|
end50f4434ef96916d3e65ad3cc236d1723:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZero(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (Zero [0] _ mem)
|
|
// cond:
|
|
// result: mem
|
|
{
|
|
if v.AuxInt != 0 {
|
|
goto endc9a38a60f0322f93682daa824611272c
|
|
}
|
|
mem := v.Args[1]
|
|
v.Op = OpCopy
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.Type = mem.Type
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endc9a38a60f0322f93682daa824611272c
|
|
endc9a38a60f0322f93682daa824611272c:
|
|
;
|
|
// match: (Zero [1] destptr mem)
|
|
// cond:
|
|
// result: (MOVBstoreconst [0] destptr mem)
|
|
{
|
|
if v.AuxInt != 1 {
|
|
goto ende0161981658beee468c9e2368fe31eb8
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVBstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
v.AddArg(destptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto ende0161981658beee468c9e2368fe31eb8
|
|
ende0161981658beee468c9e2368fe31eb8:
|
|
;
|
|
// match: (Zero [2] destptr mem)
|
|
// cond:
|
|
// result: (MOVWstoreconst [0] destptr mem)
|
|
{
|
|
if v.AuxInt != 2 {
|
|
goto end4e4aaf641bf2818bb71f1397e4685bdd
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVWstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
v.AddArg(destptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end4e4aaf641bf2818bb71f1397e4685bdd
|
|
end4e4aaf641bf2818bb71f1397e4685bdd:
|
|
;
|
|
// match: (Zero [4] destptr mem)
|
|
// cond:
|
|
// result: (MOVLstoreconst [0] destptr mem)
|
|
{
|
|
if v.AuxInt != 4 {
|
|
goto end7612f59dd66ebfc632ea5bc85f5437b5
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVLstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
v.AddArg(destptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end7612f59dd66ebfc632ea5bc85f5437b5
|
|
end7612f59dd66ebfc632ea5bc85f5437b5:
|
|
;
|
|
// match: (Zero [8] destptr mem)
|
|
// cond:
|
|
// result: (MOVQstoreconst [0] destptr mem)
|
|
{
|
|
if v.AuxInt != 8 {
|
|
goto end07aaaebfa15a48c52cd79b68e28d266f
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = 0
|
|
v.AddArg(destptr)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto end07aaaebfa15a48c52cd79b68e28d266f
|
|
end07aaaebfa15a48c52cd79b68e28d266f:
|
|
;
|
|
// match: (Zero [3] destptr mem)
|
|
// cond:
|
|
// result: (MOVBstoreconst [makeValAndOff(0,2)] destptr (MOVWstoreconst [0] destptr mem))
|
|
{
|
|
if v.AuxInt != 3 {
|
|
goto end3bf4a24a87e0727b9bcfbb5fcd24aabe
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVBstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 2)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVWstoreconst, TypeInvalid)
|
|
v0.AuxInt = 0
|
|
v0.AddArg(destptr)
|
|
v0.AddArg(mem)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end3bf4a24a87e0727b9bcfbb5fcd24aabe
|
|
end3bf4a24a87e0727b9bcfbb5fcd24aabe:
|
|
;
|
|
// match: (Zero [5] destptr mem)
|
|
// cond:
|
|
// result: (MOVBstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem))
|
|
{
|
|
if v.AuxInt != 5 {
|
|
goto end567e4a90c6867faf1dfc2cd57daf2ce4
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVBstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 4)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVLstoreconst, TypeInvalid)
|
|
v0.AuxInt = 0
|
|
v0.AddArg(destptr)
|
|
v0.AddArg(mem)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end567e4a90c6867faf1dfc2cd57daf2ce4
|
|
end567e4a90c6867faf1dfc2cd57daf2ce4:
|
|
;
|
|
// match: (Zero [6] destptr mem)
|
|
// cond:
|
|
// result: (MOVWstoreconst [makeValAndOff(0,4)] destptr (MOVLstoreconst [0] destptr mem))
|
|
{
|
|
if v.AuxInt != 6 {
|
|
goto end7cddcaf215fcc2cbca9aa958147b2380
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVWstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 4)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVLstoreconst, TypeInvalid)
|
|
v0.AuxInt = 0
|
|
v0.AddArg(destptr)
|
|
v0.AddArg(mem)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end7cddcaf215fcc2cbca9aa958147b2380
|
|
end7cddcaf215fcc2cbca9aa958147b2380:
|
|
;
|
|
// match: (Zero [7] destptr mem)
|
|
// cond:
|
|
// result: (MOVLstoreconst [makeValAndOff(0,3)] destptr (MOVLstoreconst [0] destptr mem))
|
|
{
|
|
if v.AuxInt != 7 {
|
|
goto end1b58cabccbc912ea4e1cf99be8a9fbf7
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVLstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 3)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVLstoreconst, TypeInvalid)
|
|
v0.AuxInt = 0
|
|
v0.AddArg(destptr)
|
|
v0.AddArg(mem)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end1b58cabccbc912ea4e1cf99be8a9fbf7
|
|
end1b58cabccbc912ea4e1cf99be8a9fbf7:
|
|
;
|
|
// match: (Zero [size] destptr mem)
|
|
// cond: size%8 != 0 && size > 8
|
|
// result: (Zero [size-size%8] (ADDQconst destptr [size%8]) (MOVQstoreconst [0] destptr mem))
|
|
{
|
|
size := v.AuxInt
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(size%8 != 0 && size > 8) {
|
|
goto endc8760f86b83b1372fce0042ab5200fc1
|
|
}
|
|
v.Op = OpZero
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = size - size%8
|
|
v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v0.AddArg(destptr)
|
|
v0.AuxInt = size % 8
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v1.AuxInt = 0
|
|
v1.AddArg(destptr)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto endc8760f86b83b1372fce0042ab5200fc1
|
|
endc8760f86b83b1372fce0042ab5200fc1:
|
|
;
|
|
// match: (Zero [16] destptr mem)
|
|
// cond:
|
|
// result: (MOVQstoreconst [makeValAndOff(0,8)] destptr (MOVQstoreconst [0] destptr mem))
|
|
{
|
|
if v.AuxInt != 16 {
|
|
goto endf1447d60cbf8025adaf1a02a2cd219c4
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 8)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v0.AuxInt = 0
|
|
v0.AddArg(destptr)
|
|
v0.AddArg(mem)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto endf1447d60cbf8025adaf1a02a2cd219c4
|
|
endf1447d60cbf8025adaf1a02a2cd219c4:
|
|
;
|
|
// match: (Zero [24] destptr mem)
|
|
// cond:
|
|
// result: (MOVQstoreconst [makeValAndOff(0,16)] destptr (MOVQstoreconst [makeValAndOff(0,8)] destptr (MOVQstoreconst [0] destptr mem)))
|
|
{
|
|
if v.AuxInt != 24 {
|
|
goto end57f2984a61c64f71a528e7fa75576095
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 16)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v0.AuxInt = makeValAndOff(0, 8)
|
|
v0.AddArg(destptr)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v1.AuxInt = 0
|
|
v1.AddArg(destptr)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v0.AddArg(v1)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end57f2984a61c64f71a528e7fa75576095
|
|
end57f2984a61c64f71a528e7fa75576095:
|
|
;
|
|
// match: (Zero [32] destptr mem)
|
|
// cond:
|
|
// result: (MOVQstoreconst [makeValAndOff(0,24)] destptr (MOVQstoreconst [makeValAndOff(0,16)] destptr (MOVQstoreconst [makeValAndOff(0,8)] destptr (MOVQstoreconst [0] destptr mem))))
|
|
{
|
|
if v.AuxInt != 32 {
|
|
goto end418a59f9f84dd389d37ae5c24aba2760
|
|
}
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
v.Op = OpAMD64MOVQstoreconst
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = makeValAndOff(0, 24)
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v0.AuxInt = makeValAndOff(0, 16)
|
|
v0.AddArg(destptr)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v1.AuxInt = makeValAndOff(0, 8)
|
|
v1.AddArg(destptr)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVQstoreconst, TypeInvalid)
|
|
v2.AuxInt = 0
|
|
v2.AddArg(destptr)
|
|
v2.AddArg(mem)
|
|
v2.Type = TypeMem
|
|
v1.AddArg(v2)
|
|
v1.Type = TypeMem
|
|
v0.AddArg(v1)
|
|
v0.Type = TypeMem
|
|
v.AddArg(v0)
|
|
return true
|
|
}
|
|
goto end418a59f9f84dd389d37ae5c24aba2760
|
|
end418a59f9f84dd389d37ae5c24aba2760:
|
|
;
|
|
// match: (Zero [size] destptr mem)
|
|
// cond: size <= 1024 && size%8 == 0 && size%16 != 0
|
|
// result: (Zero [size-8] (ADDQconst [8] destptr) (MOVQstore destptr (MOVQconst [0]) mem))
|
|
{
|
|
size := v.AuxInt
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(size <= 1024 && size%8 == 0 && size%16 != 0) {
|
|
goto end240266449c3e493db1c3b38a78682ff0
|
|
}
|
|
v.Op = OpZero
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = size - 8
|
|
v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v0.AuxInt = 8
|
|
v0.AddArg(destptr)
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVQstore, TypeInvalid)
|
|
v1.AddArg(destptr)
|
|
v2 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
|
|
v2.AuxInt = 0
|
|
v2.Type = config.fe.TypeUInt64()
|
|
v1.AddArg(v2)
|
|
v1.AddArg(mem)
|
|
v1.Type = TypeMem
|
|
v.AddArg(v1)
|
|
return true
|
|
}
|
|
goto end240266449c3e493db1c3b38a78682ff0
|
|
end240266449c3e493db1c3b38a78682ff0:
|
|
;
|
|
// match: (Zero [size] destptr mem)
|
|
// cond: size <= 1024 && size%16 == 0
|
|
// result: (DUFFZERO [duffStart(size)] (ADDQconst [duffAdj(size)] destptr) (MOVOconst [0]) mem)
|
|
{
|
|
size := v.AuxInt
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(size <= 1024 && size%16 == 0) {
|
|
goto endf508bb887eee9119069b22c23dbca138
|
|
}
|
|
v.Op = OpAMD64DUFFZERO
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AuxInt = duffStart(size)
|
|
v0 := b.NewValue0(v.Line, OpAMD64ADDQconst, TypeInvalid)
|
|
v0.AuxInt = duffAdj(size)
|
|
v0.AddArg(destptr)
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVOconst, TypeInvalid)
|
|
v1.AuxInt = 0
|
|
v1.Type = TypeInt128
|
|
v.AddArg(v1)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endf508bb887eee9119069b22c23dbca138
|
|
endf508bb887eee9119069b22c23dbca138:
|
|
;
|
|
// match: (Zero [size] destptr mem)
|
|
// cond: size > 1024 && size%8 == 0
|
|
// result: (REPSTOSQ destptr (MOVQconst [size/8]) (MOVQconst [0]) mem)
|
|
{
|
|
size := v.AuxInt
|
|
destptr := v.Args[0]
|
|
mem := v.Args[1]
|
|
if !(size > 1024 && size%8 == 0) {
|
|
goto endb9d55d4ba0e70ed918e3ac757727441b
|
|
}
|
|
v.Op = OpAMD64REPSTOSQ
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(destptr)
|
|
v0 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
|
|
v0.AuxInt = size / 8
|
|
v0.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v0)
|
|
v1 := b.NewValue0(v.Line, OpAMD64MOVQconst, TypeInvalid)
|
|
v1.AuxInt = 0
|
|
v1.Type = config.fe.TypeUInt64()
|
|
v.AddArg(v1)
|
|
v.AddArg(mem)
|
|
return true
|
|
}
|
|
goto endb9d55d4ba0e70ed918e3ac757727441b
|
|
endb9d55d4ba0e70ed918e3ac757727441b:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZeroExt16to32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ZeroExt16to32 x)
|
|
// cond:
|
|
// result: (MOVWQZX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVWQZX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endbfff79412a2cc96095069c66812844b4
|
|
endbfff79412a2cc96095069c66812844b4:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZeroExt16to64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ZeroExt16to64 x)
|
|
// cond:
|
|
// result: (MOVWQZX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVWQZX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end7a40262c5c856101058d2bd518ed0910
|
|
end7a40262c5c856101058d2bd518ed0910:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZeroExt32to64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ZeroExt32to64 x)
|
|
// cond:
|
|
// result: (MOVLQZX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVLQZX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto enddf83bdc8cc6c5673a9ef7aca7affe45a
|
|
enddf83bdc8cc6c5673a9ef7aca7affe45a:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZeroExt8to16(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ZeroExt8to16 x)
|
|
// cond:
|
|
// result: (MOVBQZX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVBQZX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endd03d53d2a585727e4107ae1a3cc55479
|
|
endd03d53d2a585727e4107ae1a3cc55479:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZeroExt8to32(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ZeroExt8to32 x)
|
|
// cond:
|
|
// result: (MOVBQZX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVBQZX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto endcbd33e965b3dab14fced5ae93d8949de
|
|
endcbd33e965b3dab14fced5ae93d8949de:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteValueAMD64_OpZeroExt8to64(v *Value, config *Config) bool {
|
|
b := v.Block
|
|
_ = b
|
|
// match: (ZeroExt8to64 x)
|
|
// cond:
|
|
// result: (MOVBQZX x)
|
|
{
|
|
x := v.Args[0]
|
|
v.Op = OpAMD64MOVBQZX
|
|
v.AuxInt = 0
|
|
v.Aux = nil
|
|
v.resetArgs()
|
|
v.AddArg(x)
|
|
return true
|
|
}
|
|
goto end63ae7cc15db9d15189b2f1342604b2cb
|
|
end63ae7cc15db9d15189b2f1342604b2cb:
|
|
;
|
|
return false
|
|
}
|
|
func rewriteBlockAMD64(b *Block) bool {
|
|
switch b.Kind {
|
|
case BlockAMD64EQ:
|
|
// match: (EQ (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (EQ cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end6b8e9afc73b1c4d528f31a60d2575fae
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64EQ
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end6b8e9afc73b1c4d528f31a60d2575fae
|
|
end6b8e9afc73b1c4d528f31a60d2575fae:
|
|
;
|
|
// match: (EQ (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end9ff0ac95bed10cc8e2b88351720bf254
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end9ff0ac95bed10cc8e2b88351720bf254
|
|
end9ff0ac95bed10cc8e2b88351720bf254:
|
|
;
|
|
// match: (EQ (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto endb087fca771315fb0f3e36b4f3daa1b4f
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto endb087fca771315fb0f3e36b4f3daa1b4f
|
|
endb087fca771315fb0f3e36b4f3daa1b4f:
|
|
;
|
|
// match: (EQ (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto endd1884731c9bd3c1cc1b27617e4573add
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto endd1884731c9bd3c1cc1b27617e4573add
|
|
endd1884731c9bd3c1cc1b27617e4573add:
|
|
;
|
|
// match: (EQ (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end13acc127fef124a130ad1e79fd6a58c9
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end13acc127fef124a130ad1e79fd6a58c9
|
|
end13acc127fef124a130ad1e79fd6a58c9:
|
|
;
|
|
// match: (EQ (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end4bdb3694a7ed9860cc65f54840b11e84
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end4bdb3694a7ed9860cc65f54840b11e84
|
|
end4bdb3694a7ed9860cc65f54840b11e84:
|
|
;
|
|
case BlockAMD64GE:
|
|
// match: (GE (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (LE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end0610f000a6988ee8310307ec2ea138f8
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64LE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end0610f000a6988ee8310307ec2ea138f8
|
|
end0610f000a6988ee8310307ec2ea138f8:
|
|
;
|
|
// match: (GE (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end24ae40580bbb8675d15f6d1451beeb56
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end24ae40580bbb8675d15f6d1451beeb56
|
|
end24ae40580bbb8675d15f6d1451beeb56:
|
|
;
|
|
// match: (GE (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto end40cf2bb5d1a99146cc6ce5e9a9dc7eee
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end40cf2bb5d1a99146cc6ce5e9a9dc7eee
|
|
end40cf2bb5d1a99146cc6ce5e9a9dc7eee:
|
|
;
|
|
// match: (GE (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto end2d4809306e6243116f4c1b27c7c9e503
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end2d4809306e6243116f4c1b27c7c9e503
|
|
end2d4809306e6243116f4c1b27c7c9e503:
|
|
;
|
|
// match: (GE (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end842c411ddb1c5583e1e986f2826bb3cf
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end842c411ddb1c5583e1e986f2826bb3cf
|
|
end842c411ddb1c5583e1e986f2826bb3cf:
|
|
;
|
|
// match: (GE (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end7402ddc29ccc96070353e9a04e126444
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end7402ddc29ccc96070353e9a04e126444
|
|
end7402ddc29ccc96070353e9a04e126444:
|
|
;
|
|
case BlockAMD64GT:
|
|
// match: (GT (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (LT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto endf60c0660b6a8aa9565c97fc87f04eb34
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64LT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endf60c0660b6a8aa9565c97fc87f04eb34
|
|
endf60c0660b6a8aa9565c97fc87f04eb34:
|
|
;
|
|
// match: (GT (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end2ba8650a12af813cee310b2a81b9ba1b
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end2ba8650a12af813cee310b2a81b9ba1b
|
|
end2ba8650a12af813cee310b2a81b9ba1b:
|
|
;
|
|
// match: (GT (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto endbe873b5adbcdd272c99e04e063f9b7ce
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto endbe873b5adbcdd272c99e04e063f9b7ce
|
|
endbe873b5adbcdd272c99e04e063f9b7ce:
|
|
;
|
|
// match: (GT (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto ende5dd5906f7fdb5c0e59eeed92a3684d3
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto ende5dd5906f7fdb5c0e59eeed92a3684d3
|
|
ende5dd5906f7fdb5c0e59eeed92a3684d3:
|
|
;
|
|
// match: (GT (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end7d92e57429ee02c3707f39d861c94f4c
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end7d92e57429ee02c3707f39d861c94f4c
|
|
end7d92e57429ee02c3707f39d861c94f4c:
|
|
;
|
|
// match: (GT (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end9d77d9a15c1b0938558a4ce821d50aa1
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end9d77d9a15c1b0938558a4ce821d50aa1
|
|
end9d77d9a15c1b0938558a4ce821d50aa1:
|
|
;
|
|
case BlockIf:
|
|
// match: (If (SETL cmp) yes no)
|
|
// cond:
|
|
// result: (LT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETL {
|
|
goto end94277282f4b83f0c035b23711a075801
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64LT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end94277282f4b83f0c035b23711a075801
|
|
end94277282f4b83f0c035b23711a075801:
|
|
;
|
|
// match: (If (SETLE cmp) yes no)
|
|
// cond:
|
|
// result: (LE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETLE {
|
|
goto enda84798dd797927b54a9a2987421b2ba2
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64LE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto enda84798dd797927b54a9a2987421b2ba2
|
|
enda84798dd797927b54a9a2987421b2ba2:
|
|
;
|
|
// match: (If (SETG cmp) yes no)
|
|
// cond:
|
|
// result: (GT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETG {
|
|
goto end3434ef985979cbf394455ab5b559567c
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64GT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end3434ef985979cbf394455ab5b559567c
|
|
end3434ef985979cbf394455ab5b559567c:
|
|
;
|
|
// match: (If (SETGE cmp) yes no)
|
|
// cond:
|
|
// result: (GE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETGE {
|
|
goto endee147d81d8620a5e23cb92bd9f13cf8d
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64GE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endee147d81d8620a5e23cb92bd9f13cf8d
|
|
endee147d81d8620a5e23cb92bd9f13cf8d:
|
|
;
|
|
// match: (If (SETEQ cmp) yes no)
|
|
// cond:
|
|
// result: (EQ cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETEQ {
|
|
goto ende7d85ccc850fc3963c50a91df096de17
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64EQ
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto ende7d85ccc850fc3963c50a91df096de17
|
|
ende7d85ccc850fc3963c50a91df096de17:
|
|
;
|
|
// match: (If (SETNE cmp) yes no)
|
|
// cond:
|
|
// result: (NE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETNE {
|
|
goto endba4b54260ecda1b5731b129c0eb493d0
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64NE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endba4b54260ecda1b5731b129c0eb493d0
|
|
endba4b54260ecda1b5731b129c0eb493d0:
|
|
;
|
|
// match: (If (SETB cmp) yes no)
|
|
// cond:
|
|
// result: (ULT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETB {
|
|
goto endf84eedfcd3f18f5c9c3f3d1045a24330
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64ULT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endf84eedfcd3f18f5c9c3f3d1045a24330
|
|
endf84eedfcd3f18f5c9c3f3d1045a24330:
|
|
;
|
|
// match: (If (SETBE cmp) yes no)
|
|
// cond:
|
|
// result: (ULE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETBE {
|
|
goto endfe0178f6f4406945ca8966817d04be60
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64ULE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endfe0178f6f4406945ca8966817d04be60
|
|
endfe0178f6f4406945ca8966817d04be60:
|
|
;
|
|
// match: (If (SETA cmp) yes no)
|
|
// cond:
|
|
// result: (UGT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETA {
|
|
goto end2b5a2d7756bdba01a732bf54d9acdb73
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end2b5a2d7756bdba01a732bf54d9acdb73
|
|
end2b5a2d7756bdba01a732bf54d9acdb73:
|
|
;
|
|
// match: (If (SETAE cmp) yes no)
|
|
// cond:
|
|
// result: (UGE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETAE {
|
|
goto end9bea9963c3c5dfb97249a5feb8287f94
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end9bea9963c3c5dfb97249a5feb8287f94
|
|
end9bea9963c3c5dfb97249a5feb8287f94:
|
|
;
|
|
// match: (If (SETGF cmp) yes no)
|
|
// cond:
|
|
// result: (UGT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETGF {
|
|
goto enda72d68674cfa26b5982a43756bca6767
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto enda72d68674cfa26b5982a43756bca6767
|
|
enda72d68674cfa26b5982a43756bca6767:
|
|
;
|
|
// match: (If (SETGEF cmp) yes no)
|
|
// cond:
|
|
// result: (UGE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETGEF {
|
|
goto endccc171c1d66dd60ac0275d1f78259315
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endccc171c1d66dd60ac0275d1f78259315
|
|
endccc171c1d66dd60ac0275d1f78259315:
|
|
;
|
|
// match: (If (SETEQF cmp) yes no)
|
|
// cond:
|
|
// result: (EQF cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETEQF {
|
|
goto end58cb74d05266a79003ebdd733afb66fa
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64EQF
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end58cb74d05266a79003ebdd733afb66fa
|
|
end58cb74d05266a79003ebdd733afb66fa:
|
|
;
|
|
// match: (If (SETNEF cmp) yes no)
|
|
// cond:
|
|
// result: (NEF cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64SETNEF {
|
|
goto endaa989df10b5bbc5fdf8f7f0b81767e86
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64NEF
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endaa989df10b5bbc5fdf8f7f0b81767e86
|
|
endaa989df10b5bbc5fdf8f7f0b81767e86:
|
|
;
|
|
// match: (If cond yes no)
|
|
// cond:
|
|
// result: (NE (TESTB cond cond) yes no)
|
|
{
|
|
v := b.Control
|
|
cond := v
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64NE
|
|
v0 := b.NewValue0(v.Line, OpAMD64TESTB, TypeInvalid)
|
|
v0.AddArg(cond)
|
|
v0.AddArg(cond)
|
|
v0.Type = TypeFlags
|
|
b.Control = v0
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end5bdbb8d5ea62ff2a76dccf3f9e89d94d
|
|
end5bdbb8d5ea62ff2a76dccf3f9e89d94d:
|
|
;
|
|
case BlockAMD64LE:
|
|
// match: (LE (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (GE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end0d49d7d087fe7578e8015cf13dae37e3
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64GE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end0d49d7d087fe7578e8015cf13dae37e3
|
|
end0d49d7d087fe7578e8015cf13dae37e3:
|
|
;
|
|
// match: (LE (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end794469f5273ff9b2867ec900775c72d2
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end794469f5273ff9b2867ec900775c72d2
|
|
end794469f5273ff9b2867ec900775c72d2:
|
|
;
|
|
// match: (LE (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto end0b9fee7a7eb47fe268039bc0e529d6ac
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end0b9fee7a7eb47fe268039bc0e529d6ac
|
|
end0b9fee7a7eb47fe268039bc0e529d6ac:
|
|
;
|
|
// match: (LE (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto end519d8c93a652b9062fba49942dc7d28d
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end519d8c93a652b9062fba49942dc7d28d
|
|
end519d8c93a652b9062fba49942dc7d28d:
|
|
;
|
|
// match: (LE (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto endbd11ec75f000579a43fd6507282b307d
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto endbd11ec75f000579a43fd6507282b307d
|
|
endbd11ec75f000579a43fd6507282b307d:
|
|
;
|
|
// match: (LE (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end3828ab56cc3c548c96ac30592e5f865a
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end3828ab56cc3c548c96ac30592e5f865a
|
|
end3828ab56cc3c548c96ac30592e5f865a:
|
|
;
|
|
case BlockAMD64LT:
|
|
// match: (LT (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (GT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end6a408cde0fee0ae7b7da0443c8d902bf
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64GT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end6a408cde0fee0ae7b7da0443c8d902bf
|
|
end6a408cde0fee0ae7b7da0443c8d902bf:
|
|
;
|
|
// match: (LT (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto enda9dfcd37198ce9684d4bb3a2e54feea9
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto enda9dfcd37198ce9684d4bb3a2e54feea9
|
|
enda9dfcd37198ce9684d4bb3a2e54feea9:
|
|
;
|
|
// match: (LT (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto ende2b678683d46e68bb0b1503f351917dc
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto ende2b678683d46e68bb0b1503f351917dc
|
|
ende2b678683d46e68bb0b1503f351917dc:
|
|
;
|
|
// match: (LT (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto end24e744700aa56591fbd23e1335d6e293
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end24e744700aa56591fbd23e1335d6e293
|
|
end24e744700aa56591fbd23e1335d6e293:
|
|
;
|
|
// match: (LT (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto enda178f2150e3da5c17e768a4f81af5f9a
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto enda178f2150e3da5c17e768a4f81af5f9a
|
|
enda178f2150e3da5c17e768a4f81af5f9a:
|
|
;
|
|
// match: (LT (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end361a42127127ede8ea30e991bb099ebb
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end361a42127127ede8ea30e991bb099ebb
|
|
end361a42127127ede8ea30e991bb099ebb:
|
|
;
|
|
case BlockAMD64NE:
|
|
// match: (NE (TESTB (SETL cmp)) yes no)
|
|
// cond:
|
|
// result: (LT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end0b9ca165d6b395de676eebef94bc62f7
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETL {
|
|
goto end0b9ca165d6b395de676eebef94bc62f7
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64LT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end0b9ca165d6b395de676eebef94bc62f7
|
|
end0b9ca165d6b395de676eebef94bc62f7:
|
|
;
|
|
// match: (NE (TESTB (SETLE cmp)) yes no)
|
|
// cond:
|
|
// result: (LE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto endaaba0ee4d0ff8c66a1c3107d2a14c4bc
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETLE {
|
|
goto endaaba0ee4d0ff8c66a1c3107d2a14c4bc
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64LE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endaaba0ee4d0ff8c66a1c3107d2a14c4bc
|
|
endaaba0ee4d0ff8c66a1c3107d2a14c4bc:
|
|
;
|
|
// match: (NE (TESTB (SETG cmp)) yes no)
|
|
// cond:
|
|
// result: (GT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end1b689463137526b36ba9ceed1e76e512
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETG {
|
|
goto end1b689463137526b36ba9ceed1e76e512
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64GT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end1b689463137526b36ba9ceed1e76e512
|
|
end1b689463137526b36ba9ceed1e76e512:
|
|
;
|
|
// match: (NE (TESTB (SETGE cmp)) yes no)
|
|
// cond:
|
|
// result: (GE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end99eefee595c658b997f41577ed853c2e
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETGE {
|
|
goto end99eefee595c658b997f41577ed853c2e
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64GE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end99eefee595c658b997f41577ed853c2e
|
|
end99eefee595c658b997f41577ed853c2e:
|
|
;
|
|
// match: (NE (TESTB (SETEQ cmp)) yes no)
|
|
// cond:
|
|
// result: (EQ cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end371b67d3d63e9b92d848b09c3324e8b9
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETEQ {
|
|
goto end371b67d3d63e9b92d848b09c3324e8b9
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64EQ
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end371b67d3d63e9b92d848b09c3324e8b9
|
|
end371b67d3d63e9b92d848b09c3324e8b9:
|
|
;
|
|
// match: (NE (TESTB (SETNE cmp)) yes no)
|
|
// cond:
|
|
// result: (NE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto endd245f2aac2191d32e57cd2e321daa453
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETNE {
|
|
goto endd245f2aac2191d32e57cd2e321daa453
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64NE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endd245f2aac2191d32e57cd2e321daa453
|
|
endd245f2aac2191d32e57cd2e321daa453:
|
|
;
|
|
// match: (NE (TESTB (SETB cmp)) yes no)
|
|
// cond:
|
|
// result: (ULT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end90c4bec851e734d37457d611b1a5ff28
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETB {
|
|
goto end90c4bec851e734d37457d611b1a5ff28
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64ULT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end90c4bec851e734d37457d611b1a5ff28
|
|
end90c4bec851e734d37457d611b1a5ff28:
|
|
;
|
|
// match: (NE (TESTB (SETBE cmp)) yes no)
|
|
// cond:
|
|
// result: (ULE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end3a68a28114e9b89ee0708823386bc1ee
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETBE {
|
|
goto end3a68a28114e9b89ee0708823386bc1ee
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64ULE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end3a68a28114e9b89ee0708823386bc1ee
|
|
end3a68a28114e9b89ee0708823386bc1ee:
|
|
;
|
|
// match: (NE (TESTB (SETA cmp)) yes no)
|
|
// cond:
|
|
// result: (UGT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end16496f57185756e960d536b057c776c0
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETA {
|
|
goto end16496f57185756e960d536b057c776c0
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end16496f57185756e960d536b057c776c0
|
|
end16496f57185756e960d536b057c776c0:
|
|
;
|
|
// match: (NE (TESTB (SETAE cmp)) yes no)
|
|
// cond:
|
|
// result: (UGE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto endbd122fd599aeb9e60881a0fa735e2fde
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETAE {
|
|
goto endbd122fd599aeb9e60881a0fa735e2fde
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endbd122fd599aeb9e60881a0fa735e2fde
|
|
endbd122fd599aeb9e60881a0fa735e2fde:
|
|
;
|
|
// match: (NE (TESTB (SETGF cmp)) yes no)
|
|
// cond:
|
|
// result: (UGT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto endb2499521f7f351e24757f8c918c3598e
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETGF {
|
|
goto endb2499521f7f351e24757f8c918c3598e
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endb2499521f7f351e24757f8c918c3598e
|
|
endb2499521f7f351e24757f8c918c3598e:
|
|
;
|
|
// match: (NE (TESTB (SETGEF cmp)) yes no)
|
|
// cond:
|
|
// result: (UGE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end20461774babea665c4ca7c4f790a7209
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETGEF {
|
|
goto end20461774babea665c4ca7c4f790a7209
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end20461774babea665c4ca7c4f790a7209
|
|
end20461774babea665c4ca7c4f790a7209:
|
|
;
|
|
// match: (NE (TESTB (SETEQF cmp)) yes no)
|
|
// cond:
|
|
// result: (EQF cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto end236616ef13d489b78736cda7bcc1d168
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETEQF {
|
|
goto end236616ef13d489b78736cda7bcc1d168
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64EQF
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end236616ef13d489b78736cda7bcc1d168
|
|
end236616ef13d489b78736cda7bcc1d168:
|
|
;
|
|
// match: (NE (TESTB (SETNEF cmp)) yes no)
|
|
// cond:
|
|
// result: (NEF cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64TESTB {
|
|
goto endc992f3c266b16cb5f6aa98faa8f55600
|
|
}
|
|
if v.Args[0].Op != OpAMD64SETNEF {
|
|
goto endc992f3c266b16cb5f6aa98faa8f55600
|
|
}
|
|
cmp := v.Args[0].Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64NEF
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endc992f3c266b16cb5f6aa98faa8f55600
|
|
endc992f3c266b16cb5f6aa98faa8f55600:
|
|
;
|
|
// match: (NE (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (NE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end713001aba794e50b582fbff930e110af
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64NE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end713001aba794e50b582fbff930e110af
|
|
end713001aba794e50b582fbff930e110af:
|
|
;
|
|
// match: (NE (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end55cc491bc7fc08ef27cadaa80d197545
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end55cc491bc7fc08ef27cadaa80d197545
|
|
end55cc491bc7fc08ef27cadaa80d197545:
|
|
;
|
|
// match: (NE (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto end3293c7b37d9fcc6bd5add16c94108a4b
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end3293c7b37d9fcc6bd5add16c94108a4b
|
|
end3293c7b37d9fcc6bd5add16c94108a4b:
|
|
;
|
|
// match: (NE (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto end1a49ef88420e9d7fd745f9675ca01d6e
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end1a49ef88420e9d7fd745f9675ca01d6e
|
|
end1a49ef88420e9d7fd745f9675ca01d6e:
|
|
;
|
|
// match: (NE (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto endbd468825bdf21bca47f8d83d580794ec
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endbd468825bdf21bca47f8d83d580794ec
|
|
endbd468825bdf21bca47f8d83d580794ec:
|
|
;
|
|
// match: (NE (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end43cf7171afb4610818c4b63cc14c1f30
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end43cf7171afb4610818c4b63cc14c1f30
|
|
end43cf7171afb4610818c4b63cc14c1f30:
|
|
;
|
|
case BlockAMD64UGE:
|
|
// match: (UGE (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (ULE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto ende3e4ddc183ca1a46598b11c2d0d13966
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64ULE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto ende3e4ddc183ca1a46598b11c2d0d13966
|
|
ende3e4ddc183ca1a46598b11c2d0d13966:
|
|
;
|
|
// match: (UGE (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end13b873811b0cfc7b08501fa2b96cbaa5
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end13b873811b0cfc7b08501fa2b96cbaa5
|
|
end13b873811b0cfc7b08501fa2b96cbaa5:
|
|
;
|
|
// match: (UGE (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto end399c10dc3dcdb5864558ecbac4566b7d
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end399c10dc3dcdb5864558ecbac4566b7d
|
|
end399c10dc3dcdb5864558ecbac4566b7d:
|
|
;
|
|
// match: (UGE (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto end3013dbd3841b20b5030bafb98ee5e38f
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end3013dbd3841b20b5030bafb98ee5e38f
|
|
end3013dbd3841b20b5030bafb98ee5e38f:
|
|
;
|
|
// match: (UGE (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end9727eb4bb399457be62dc382bb9a0913
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end9727eb4bb399457be62dc382bb9a0913
|
|
end9727eb4bb399457be62dc382bb9a0913:
|
|
;
|
|
// match: (UGE (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto ende4099f954bd6511668fda560c56e89b1
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto ende4099f954bd6511668fda560c56e89b1
|
|
ende4099f954bd6511668fda560c56e89b1:
|
|
;
|
|
case BlockAMD64UGT:
|
|
// match: (UGT (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (ULT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end49818853af2e5251175d06c62768cae7
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64ULT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end49818853af2e5251175d06c62768cae7
|
|
end49818853af2e5251175d06c62768cae7:
|
|
;
|
|
// match: (UGT (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end97e91c3348cb91e9278902aaa7fb050a
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end97e91c3348cb91e9278902aaa7fb050a
|
|
end97e91c3348cb91e9278902aaa7fb050a:
|
|
;
|
|
// match: (UGT (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto ende2c57da783c6ad18203c9c418ab0de6a
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto ende2c57da783c6ad18203c9c418ab0de6a
|
|
ende2c57da783c6ad18203c9c418ab0de6a:
|
|
;
|
|
// match: (UGT (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto end65100b76cf3975a42b235b0e10fea2b1
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end65100b76cf3975a42b235b0e10fea2b1
|
|
end65100b76cf3975a42b235b0e10fea2b1:
|
|
;
|
|
// match: (UGT (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end5db8fa9a32980847176e980aa1899bb3
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end5db8fa9a32980847176e980aa1899bb3
|
|
end5db8fa9a32980847176e980aa1899bb3:
|
|
;
|
|
// match: (UGT (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end1095a388cf1534294952f4ef4ce3e940
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end1095a388cf1534294952f4ef4ce3e940
|
|
end1095a388cf1534294952f4ef4ce3e940:
|
|
;
|
|
case BlockAMD64ULE:
|
|
// match: (ULE (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (UGE cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto endd6698aac0d67261293b558c95ea17b4f
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGE
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endd6698aac0d67261293b558c95ea17b4f
|
|
endd6698aac0d67261293b558c95ea17b4f:
|
|
;
|
|
// match: (ULE (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end2d801e9ad76753e9ff3e19ee7c9f8a86
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end2d801e9ad76753e9ff3e19ee7c9f8a86
|
|
end2d801e9ad76753e9ff3e19ee7c9f8a86:
|
|
;
|
|
// match: (ULE (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto end93b751a70b8587ce2c2dc0545a77246c
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end93b751a70b8587ce2c2dc0545a77246c
|
|
end93b751a70b8587ce2c2dc0545a77246c:
|
|
;
|
|
// match: (ULE (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto enda318623645491582b19f9de9b3da20e9
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto enda318623645491582b19f9de9b3da20e9
|
|
enda318623645491582b19f9de9b3da20e9:
|
|
;
|
|
// match: (ULE (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end1dfb9e417c0a518e1fa9c92edd57723e
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end1dfb9e417c0a518e1fa9c92edd57723e
|
|
end1dfb9e417c0a518e1fa9c92edd57723e:
|
|
;
|
|
// match: (ULE (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end7c9881aac5c0b34d8df3572c8f7b50f3
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end7c9881aac5c0b34d8df3572c8f7b50f3
|
|
end7c9881aac5c0b34d8df3572c8f7b50f3:
|
|
;
|
|
case BlockAMD64ULT:
|
|
// match: (ULT (InvertFlags cmp) yes no)
|
|
// cond:
|
|
// result: (UGT cmp yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64InvertFlags {
|
|
goto end35105dbc9646f02577167e45ae2f2fd2
|
|
}
|
|
cmp := v.Args[0]
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockAMD64UGT
|
|
b.Control = cmp
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end35105dbc9646f02577167e45ae2f2fd2
|
|
end35105dbc9646f02577167e45ae2f2fd2:
|
|
;
|
|
// match: (ULT (FlagEQ) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagEQ {
|
|
goto end4f7ea32f328981623154b68f21c9585f
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end4f7ea32f328981623154b68f21c9585f
|
|
end4f7ea32f328981623154b68f21c9585f:
|
|
;
|
|
// match: (ULT (FlagLT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_ULT {
|
|
goto endf8739cbf4e7cdcb02b891bbfc103654a
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto endf8739cbf4e7cdcb02b891bbfc103654a
|
|
endf8739cbf4e7cdcb02b891bbfc103654a:
|
|
;
|
|
// match: (ULT (FlagLT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagLT_UGT {
|
|
goto enddb12a8de4bdb237aa8a1b6186a0f5f01
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto enddb12a8de4bdb237aa8a1b6186a0f5f01
|
|
enddb12a8de4bdb237aa8a1b6186a0f5f01:
|
|
;
|
|
// match: (ULT (FlagGT_ULT) yes no)
|
|
// cond:
|
|
// result: (First nil yes no)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_ULT {
|
|
goto end5ceb130f54533e645b6be48ac28dd7a1
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = yes
|
|
b.Succs[1] = no
|
|
return true
|
|
}
|
|
goto end5ceb130f54533e645b6be48ac28dd7a1
|
|
end5ceb130f54533e645b6be48ac28dd7a1:
|
|
;
|
|
// match: (ULT (FlagGT_UGT) yes no)
|
|
// cond:
|
|
// result: (First nil no yes)
|
|
{
|
|
v := b.Control
|
|
if v.Op != OpAMD64FlagGT_UGT {
|
|
goto end17191a994592b633cbf6f935efbeaf72
|
|
}
|
|
yes := b.Succs[0]
|
|
no := b.Succs[1]
|
|
b.Kind = BlockFirst
|
|
b.Control = nil
|
|
b.Succs[0] = no
|
|
b.Succs[1] = yes
|
|
b.Likely *= -1
|
|
return true
|
|
}
|
|
goto end17191a994592b633cbf6f935efbeaf72
|
|
end17191a994592b633cbf6f935efbeaf72:
|
|
}
|
|
return false
|
|
}
|