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cmd/internal/obj{,/loong64}: instructions and registers for loong64
Implemented an assembler for LoongArch64(loong64 is short name) - this provides register definitions and instruction encoding as defined in the LoongArch Instruction Set Manual. LoongArch Instruction Set Manual: https://github.com/loongson/LoongArch-Documentation/releases Contributors to the linux/loong64 port are: Weining Lu <luweining@loongson.cn> Lei Wang <wanglei@loongson.cn> Lingqin Gong <gonglingqin@loongson.cn> Xiaolin Zhao <zhaoxiaolin@loongson.cn> Meidan Li <limeidan@loongson.cn> Xiaojuan Zhai <zhaixiaojuan@loongson.cn> Qiyuan Pu <puqiyuan@loongson.cn> Guoqi Chen <chenguoqi@loongson.cn> This port has been updated to Go 1.15.6: https://github.com/loongson/go Updates #46229 Change-Id: I930d2a19246496e3ca36d55539183c0f9f650ad9 Reviewed-on: https://go-review.googlesource.com/c/go/+/342309 Reviewed-by: David Chase <drchase@google.com> Auto-Submit: Ian Lance Taylor <iant@google.com> TryBot-Result: Gopher Robot <gobot@golang.org> Reviewed-by: Ian Lance Taylor <iant@google.com> Run-TryBot: Ian Lance Taylor <iant@google.com>
This commit is contained in:
Xiaodong Liu
Gopher Robot
parent
857cda4625
commit
c1105cfd43
@ -442,6 +442,7 @@ const (
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ABasePPC64
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ABaseARM64
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ABaseMIPS
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ABaseLoong64
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ABaseRISCV
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ABaseS390X
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ABaseWasm
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414
src/cmd/internal/obj/loong64/a.out.go
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414
src/cmd/internal/obj/loong64/a.out.go
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@ -0,0 +1,414 @@
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// Copyright 2022 The Go Authors. All rights reserved.
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// Use of this source code is governed by a BSD-style
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// license that can be found in the LICENSE file.
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package loong64
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import (
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"cmd/internal/obj"
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)
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//go:generate go run ../stringer.go -i $GOFILE -o anames.go -p loong64
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const (
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NSNAME = 8
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NSYM = 50
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NREG = 32 // number of general registers
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NFREG = 32 // number of floating point registers
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)
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const (
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REG_R0 = obj.RBaseLOONG64 + iota // must be a multiple of 32
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REG_R1
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REG_R2
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REG_R3
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REG_R4
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REG_R5
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REG_R6
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REG_R7
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REG_R8
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REG_R9
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REG_R10
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REG_R11
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REG_R12
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REG_R13
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REG_R14
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REG_R15
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REG_R16
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REG_R17
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REG_R18
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REG_R19
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REG_R20
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REG_R21
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REG_R22
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REG_R23
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REG_R24
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REG_R25
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REG_R26
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REG_R27
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REG_R28
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REG_R29
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REG_R30
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REG_R31
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REG_F0 // must be a multiple of 32
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REG_F1
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REG_F2
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REG_F3
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REG_F4
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REG_F5
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REG_F6
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REG_F7
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REG_F8
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REG_F9
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REG_F10
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REG_F11
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REG_F12
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REG_F13
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REG_F14
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REG_F15
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REG_F16
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REG_F17
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REG_F18
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REG_F19
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REG_F20
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REG_F21
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REG_F22
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REG_F23
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REG_F24
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REG_F25
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REG_F26
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REG_F27
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REG_F28
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REG_F29
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REG_F30
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REG_F31
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REG_FCSR0 // must be a multiple of 32
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REG_FCSR1
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REG_FCSR2
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REG_FCSR3 // only four registers are needed
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REG_FCSR4
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REG_FCSR5
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REG_FCSR6
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REG_FCSR7
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REG_FCSR8
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REG_FCSR9
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REG_FCSR10
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REG_FCSR11
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REG_FCSR12
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REG_FCSR13
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REG_FCSR14
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REG_FCSR15
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REG_FCSR16
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REG_FCSR17
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REG_FCSR18
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REG_FCSR19
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REG_FCSR20
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REG_FCSR21
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REG_FCSR22
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REG_FCSR23
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REG_FCSR24
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REG_FCSR25
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REG_FCSR26
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REG_FCSR27
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REG_FCSR28
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REG_FCSR29
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REG_FCSR30
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REG_FCSR31
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REG_FCC0 // must be a multiple of 32
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REG_FCC1
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REG_FCC2
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REG_FCC3
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REG_FCC4
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REG_FCC5
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REG_FCC6
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REG_FCC7 // only eight registers are needed
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REG_FCC8
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REG_FCC9
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REG_FCC10
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REG_FCC11
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REG_FCC12
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REG_FCC13
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REG_FCC14
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REG_FCC15
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REG_FCC16
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REG_FCC17
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REG_FCC18
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REG_FCC19
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REG_FCC20
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REG_FCC21
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REG_FCC22
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REG_FCC23
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REG_FCC24
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REG_FCC25
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REG_FCC26
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REG_FCC27
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REG_FCC28
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REG_FCC29
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REG_FCC30
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REG_FCC31
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REG_LAST = REG_FCC31 // the last defined register
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REG_SPECIAL = REG_FCSR0
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REGZERO = REG_R0 // set to zero
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REGLINK = REG_R1
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REGSP = REG_R3
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REGRET = REG_R19
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REGARG = -1 // -1 disables passing the first argument in register
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REGRT1 = REG_R19 // reserved for runtime, duffzero and duffcopy
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REGRT2 = REG_R20 // reserved for runtime, duffcopy
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REGCTXT = REG_R29 // context for closures
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REGG = REG_R22 // G in loong64
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REGTMP = REG_R30 // used by the assembler
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FREGRET = REG_F0
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)
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var LOONG64DWARFRegisters = map[int16]int16{}
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func init() {
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// f assigns dwarfregisters[from:to] = (base):(to-from+base)
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f := func(from, to, base int16) {
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for r := int16(from); r <= to; r++ {
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LOONG64DWARFRegisters[r] = (r - from) + base
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}
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}
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f(REG_R0, REG_R31, 0)
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f(REG_F0, REG_F31, 32)
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}
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const (
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BIG = 2046
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)
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const (
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// mark flags
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LABEL = 1 << 0
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LEAF = 1 << 1
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SYNC = 1 << 2
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BRANCH = 1 << 3
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)
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const (
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C_NONE = iota
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C_REG
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C_FREG
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C_FCSRREG
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C_FCCREG
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C_ZCON
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C_SCON // 12 bit signed
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C_UCON // 32 bit signed, low 12 bits 0
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C_ADD0CON
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C_AND0CON
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C_ADDCON // -0x800 <= v < 0
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C_ANDCON // 0 < v <= 0xFFF
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C_LCON // other 32
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C_DCON // other 64 (could subdivide further)
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C_SACON // $n(REG) where n <= int12
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C_SECON
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C_LACON // $n(REG) where int12 < n <= int32
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C_LECON
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C_DACON // $n(REG) where int32 < n
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C_STCON // $tlsvar
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C_SBRA
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C_LBRA
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C_SAUTO
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C_LAUTO
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C_SEXT
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C_LEXT
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C_ZOREG
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C_SOREG
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C_LOREG
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C_GOK
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C_ADDR
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C_TLS
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C_TEXTSIZE
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C_NCLASS // must be the last
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)
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const (
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AABSD = obj.ABaseLoong64 + obj.A_ARCHSPECIFIC + iota
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AABSF
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AADD
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AADDD
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AADDF
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AADDU
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AADDW
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AAND
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ABEQ
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ABGEZ
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ABLEZ
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ABGTZ
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ABLTZ
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ABFPF
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ABFPT
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ABNE
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ABREAK
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ACLO
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ACLZ
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ACMPEQD
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ACMPEQF
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ACMPGED // ACMPGED -> fcmp.sle.d
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ACMPGEF // ACMPGEF -> fcmp.sle.s
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ACMPGTD // ACMPGTD -> fcmp.slt.d
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ACMPGTF // ACMPGTF -> fcmp.slt.s
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ALU12IW
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ALU32ID
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ALU52ID
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APCADDU12I
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AJIRL
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ABGE
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ABLT
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ABLTU
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ABGEU
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ADIV
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ADIVD
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ADIVF
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ADIVU
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ADIVW
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ALL
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ALLV
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ALUI
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AMOVB
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AMOVBU
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AMOVD
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AMOVDF
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AMOVDW
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AMOVF
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AMOVFD
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AMOVFW
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AMOVH
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AMOVHU
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AMOVW
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AMOVWD
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AMOVWF
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AMOVWL
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AMOVWR
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AMUL
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AMULD
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AMULF
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AMULU
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AMULH
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AMULHU
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AMULW
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ANEGD
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ANEGF
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ANEGW
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ANEGV
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ANOOP // hardware nop
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ANOR
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AOR
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AREM
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AREMU
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ARFE
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ASC
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ASCV
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ASGT
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ASGTU
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ASLL
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ASQRTD
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ASQRTF
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ASRA
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ASRL
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ASUB
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ASUBD
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ASUBF
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ASUBU
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ASUBW
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ADBAR
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ASYSCALL
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ATEQ
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ATNE
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AWORD
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AXOR
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// 64-bit
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AMOVV
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AMOVVL
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AMOVVR
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ASLLV
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ASRAV
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ASRLV
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ADIVV
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ADIVVU
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AREMV
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AREMVU
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AMULV
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AMULVU
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AMULHV
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AMULHVU
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AADDV
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AADDVU
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ASUBV
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ASUBVU
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// 64-bit FP
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ATRUNCFV
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ATRUNCDV
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ATRUNCFW
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ATRUNCDW
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AMOVWU
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AMOVFV
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AMOVDV
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AMOVVF
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AMOVVD
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ALAST
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// aliases
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AJMP = obj.AJMP
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AJAL = obj.ACALL
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ARET = obj.ARET
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)
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func init() {
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// The asm encoder generally assumes that the lowest 5 bits of the
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// REG_XX constants match the machine instruction encoding, i.e.
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// the lowest 5 bits is the register number.
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// Check this here.
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if REG_R0%32 != 0 {
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panic("REG_R0 is not a multiple of 32")
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}
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if REG_F0%32 != 0 {
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panic("REG_F0 is not a multiple of 32")
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}
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if REG_FCSR0%32 != 0 {
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panic("REG_FCSR0 is not a multiple of 32")
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}
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if REG_FCC0%32 != 0 {
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panic("REG_FCC0 is not a multiple of 32")
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}
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}
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130
src/cmd/internal/obj/loong64/anames.go
Normal file
130
src/cmd/internal/obj/loong64/anames.go
Normal file
@ -0,0 +1,130 @@
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// Code generated by stringer -i a.out.go -o anames.go -p loong64; DO NOT EDIT.
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package loong64
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import "cmd/internal/obj"
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var Anames = []string{
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obj.A_ARCHSPECIFIC: "ABSD",
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"ABSF",
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"ADD",
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"ADDD",
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"ADDF",
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"ADDU",
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"ADDW",
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"AND",
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"BEQ",
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"BGEZ",
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"BLEZ",
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"BGTZ",
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"BLTZ",
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"BFPF",
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"BFPT",
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"BNE",
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"BREAK",
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"CLO",
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"CLZ",
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"CMPEQD",
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"CMPEQF",
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"CMPGED",
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"CMPGEF",
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"CMPGTD",
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"CMPGTF",
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"LU12IW",
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"LU32ID",
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"LU52ID",
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"PCADDU12I",
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"JIRL",
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"BGE",
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"BLT",
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"BLTU",
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"BGEU",
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"DIV",
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"DIVD",
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"DIVF",
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"DIVU",
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"DIVW",
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"LL",
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"LLV",
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"LUI",
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"MOVB",
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"MOVBU",
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"MOVD",
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"MOVDF",
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"MOVDW",
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"MOVF",
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"MOVFD",
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"MOVFW",
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"MOVH",
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"MOVHU",
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"MOVW",
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"MOVWD",
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"MOVWF",
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"MOVWL",
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"MOVWR",
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"MUL",
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"MULD",
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"MULF",
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"MULU",
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"MULH",
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"MULHU",
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"MULW",
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"NEGD",
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"NEGF",
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"NEGW",
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"NEGV",
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"NOOP",
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"NOR",
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"OR",
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"REM",
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"REMU",
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"RFE",
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"SC",
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"SCV",
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"SGT",
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"SGTU",
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"SLL",
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"SQRTD",
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"SQRTF",
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"SRA",
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"SRL",
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"SUB",
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"SUBD",
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"SUBF",
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"SUBU",
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"SUBW",
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"DBAR",
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"SYSCALL",
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"TEQ",
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"TNE",
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"WORD",
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"XOR",
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"MOVV",
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"MOVVL",
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"MOVVR",
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"SLLV",
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"SRAV",
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"SRLV",
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"DIVV",
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"DIVVU",
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"REMV",
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"REMVU",
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"MULV",
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"MULVU",
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"MULHV",
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"MULHVU",
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"ADDV",
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"ADDVU",
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"SUBV",
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"SUBVU",
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"TRUNCFV",
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"TRUNCDV",
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"TRUNCFW",
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"TRUNCDW",
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"MOVWU",
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"MOVFV",
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"MOVDV",
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"MOVVF",
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"MOVVD",
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"LAST",
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}
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1960
src/cmd/internal/obj/loong64/asm.go
Normal file
1960
src/cmd/internal/obj/loong64/asm.go
Normal file
File diff suppressed because it is too large
Load Diff
43
src/cmd/internal/obj/loong64/cnames.go
Normal file
43
src/cmd/internal/obj/loong64/cnames.go
Normal file
@ -0,0 +1,43 @@
|
||||
// Copyright 2022 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
package loong64
|
||||
|
||||
var cnames0 = []string{
|
||||
"NONE",
|
||||
"REG",
|
||||
"FREG",
|
||||
"FCREG",
|
||||
"FCSRREG",
|
||||
"FCCREG",
|
||||
"ZCON",
|
||||
"SCON",
|
||||
"UCON",
|
||||
"ADD0CON",
|
||||
"AND0CON",
|
||||
"ADDCON",
|
||||
"ANDCON",
|
||||
"LCON",
|
||||
"DCON",
|
||||
"SACON",
|
||||
"SECON",
|
||||
"LACON",
|
||||
"LECON",
|
||||
"DACON",
|
||||
"STCON",
|
||||
"SBRA",
|
||||
"LBRA",
|
||||
"SAUTO",
|
||||
"LAUTO",
|
||||
"SEXT",
|
||||
"LEXT",
|
||||
"ZOREG",
|
||||
"SOREG",
|
||||
"LOREG",
|
||||
"GOK",
|
||||
"ADDR",
|
||||
"TLS",
|
||||
"TEXTSIZE",
|
||||
"NCLASS",
|
||||
}
|
||||
46
src/cmd/internal/obj/loong64/list.go
Normal file
46
src/cmd/internal/obj/loong64/list.go
Normal file
@ -0,0 +1,46 @@
|
||||
// Copyright 2022 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
package loong64
|
||||
|
||||
import (
|
||||
"cmd/internal/obj"
|
||||
"fmt"
|
||||
)
|
||||
|
||||
func init() {
|
||||
obj.RegisterRegister(obj.RBaseLOONG64, REG_LAST+1, rconv)
|
||||
obj.RegisterOpcode(obj.ABaseLoong64, Anames)
|
||||
}
|
||||
|
||||
func rconv(r int) string {
|
||||
if r == 0 {
|
||||
return "NONE"
|
||||
}
|
||||
if r == REGG {
|
||||
// Special case.
|
||||
return "g"
|
||||
}
|
||||
if REG_R0 <= r && r <= REG_R31 {
|
||||
return fmt.Sprintf("R%d", r-REG_R0)
|
||||
}
|
||||
if REG_F0 <= r && r <= REG_F31 {
|
||||
return fmt.Sprintf("F%d", r-REG_F0)
|
||||
}
|
||||
if REG_FCSR0 <= r && r <= REG_FCSR31 {
|
||||
return fmt.Sprintf("FCSR%d", r-REG_FCSR0)
|
||||
}
|
||||
if REG_FCC0 <= r && r <= REG_FCC31 {
|
||||
return fmt.Sprintf("FCC%d", r-REG_FCC0)
|
||||
}
|
||||
return fmt.Sprintf("Rgok(%d)", r-obj.RBaseLOONG64)
|
||||
}
|
||||
|
||||
func DRconv(a int) string {
|
||||
s := "C_??"
|
||||
if a >= C_NONE && a <= C_NCLASS {
|
||||
s = cnames0[a]
|
||||
}
|
||||
return s
|
||||
}
|
||||
701
src/cmd/internal/obj/loong64/obj.go
Normal file
701
src/cmd/internal/obj/loong64/obj.go
Normal file
@ -0,0 +1,701 @@
|
||||
// Copyright 2022 The Go Authors. All rights reserved.
|
||||
// Use of this source code is governed by a BSD-style
|
||||
// license that can be found in the LICENSE file.
|
||||
|
||||
package loong64
|
||||
|
||||
import (
|
||||
"cmd/internal/obj"
|
||||
"cmd/internal/objabi"
|
||||
"cmd/internal/sys"
|
||||
|
||||
"math"
|
||||
)
|
||||
|
||||
func progedit(ctxt *obj.Link, p *obj.Prog, newprog obj.ProgAlloc) {
|
||||
// Rewrite JMP/JAL to symbol as TYPE_BRANCH.
|
||||
switch p.As {
|
||||
case AJMP,
|
||||
AJAL,
|
||||
ARET,
|
||||
obj.ADUFFZERO,
|
||||
obj.ADUFFCOPY:
|
||||
if p.To.Sym != nil {
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
}
|
||||
}
|
||||
|
||||
// Rewrite float constants to values stored in memory.
|
||||
switch p.As {
|
||||
case AMOVF:
|
||||
if p.From.Type == obj.TYPE_FCONST {
|
||||
f32 := float32(p.From.Val.(float64))
|
||||
if math.Float32bits(f32) == 0 {
|
||||
p.As = AMOVW
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGZERO
|
||||
break
|
||||
}
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Sym = ctxt.Float32Sym(f32)
|
||||
p.From.Name = obj.NAME_EXTERN
|
||||
p.From.Offset = 0
|
||||
}
|
||||
|
||||
case AMOVD:
|
||||
if p.From.Type == obj.TYPE_FCONST {
|
||||
f64 := p.From.Val.(float64)
|
||||
if math.Float64bits(f64) == 0 {
|
||||
p.As = AMOVV
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGZERO
|
||||
break
|
||||
}
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Sym = ctxt.Float64Sym(f64)
|
||||
p.From.Name = obj.NAME_EXTERN
|
||||
p.From.Offset = 0
|
||||
}
|
||||
}
|
||||
|
||||
// Rewrite SUB constants into ADD.
|
||||
switch p.As {
|
||||
case ASUB:
|
||||
if p.From.Type == obj.TYPE_CONST {
|
||||
p.From.Offset = -p.From.Offset
|
||||
p.As = AADD
|
||||
}
|
||||
|
||||
case ASUBU:
|
||||
if p.From.Type == obj.TYPE_CONST {
|
||||
p.From.Offset = -p.From.Offset
|
||||
p.As = AADDU
|
||||
}
|
||||
|
||||
case ASUBV:
|
||||
if p.From.Type == obj.TYPE_CONST {
|
||||
p.From.Offset = -p.From.Offset
|
||||
p.As = AADDV
|
||||
}
|
||||
|
||||
case ASUBVU:
|
||||
if p.From.Type == obj.TYPE_CONST {
|
||||
p.From.Offset = -p.From.Offset
|
||||
p.As = AADDVU
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func preprocess(ctxt *obj.Link, cursym *obj.LSym, newprog obj.ProgAlloc) {
|
||||
c := ctxt0{ctxt: ctxt, newprog: newprog, cursym: cursym}
|
||||
|
||||
p := c.cursym.Func().Text
|
||||
textstksiz := p.To.Offset
|
||||
|
||||
if textstksiz < 0 {
|
||||
c.ctxt.Diag("negative frame size %d - did you mean NOFRAME?", textstksiz)
|
||||
}
|
||||
if p.From.Sym.NoFrame() {
|
||||
if textstksiz != 0 {
|
||||
c.ctxt.Diag("NOFRAME functions must have a frame size of 0, not %d", textstksiz)
|
||||
}
|
||||
}
|
||||
|
||||
c.cursym.Func().Args = p.To.Val.(int32)
|
||||
c.cursym.Func().Locals = int32(textstksiz)
|
||||
|
||||
/*
|
||||
* find leaf subroutines
|
||||
* expand RET
|
||||
*/
|
||||
|
||||
for p := c.cursym.Func().Text; p != nil; p = p.Link {
|
||||
switch p.As {
|
||||
case obj.ATEXT:
|
||||
p.Mark |= LABEL | LEAF | SYNC
|
||||
if p.Link != nil {
|
||||
p.Link.Mark |= LABEL
|
||||
}
|
||||
|
||||
case AMOVW,
|
||||
AMOVV:
|
||||
if p.To.Type == obj.TYPE_REG && p.To.Reg >= REG_SPECIAL {
|
||||
p.Mark |= LABEL | SYNC
|
||||
break
|
||||
}
|
||||
if p.From.Type == obj.TYPE_REG && p.From.Reg >= REG_SPECIAL {
|
||||
p.Mark |= LABEL | SYNC
|
||||
}
|
||||
|
||||
case ASYSCALL,
|
||||
AWORD:
|
||||
p.Mark |= LABEL | SYNC
|
||||
|
||||
case ANOR:
|
||||
if p.To.Type == obj.TYPE_REG {
|
||||
if p.To.Reg == REGZERO {
|
||||
p.Mark |= LABEL | SYNC
|
||||
}
|
||||
}
|
||||
|
||||
case AJAL,
|
||||
obj.ADUFFZERO,
|
||||
obj.ADUFFCOPY:
|
||||
c.cursym.Func().Text.Mark &^= LEAF
|
||||
fallthrough
|
||||
|
||||
case AJMP,
|
||||
ABEQ,
|
||||
ABGEU,
|
||||
ABLTU,
|
||||
ABLTZ,
|
||||
ABNE,
|
||||
ABFPT, ABFPF:
|
||||
p.Mark |= BRANCH
|
||||
q1 := p.To.Target()
|
||||
if q1 != nil {
|
||||
for q1.As == obj.ANOP {
|
||||
q1 = q1.Link
|
||||
p.To.SetTarget(q1)
|
||||
}
|
||||
|
||||
if q1.Mark&LEAF == 0 {
|
||||
q1.Mark |= LABEL
|
||||
}
|
||||
}
|
||||
q1 = p.Link
|
||||
if q1 != nil {
|
||||
q1.Mark |= LABEL
|
||||
}
|
||||
|
||||
case ARET:
|
||||
if p.Link != nil {
|
||||
p.Link.Mark |= LABEL
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
var mov, add obj.As
|
||||
|
||||
add = AADDV
|
||||
mov = AMOVV
|
||||
|
||||
var q *obj.Prog
|
||||
var q1 *obj.Prog
|
||||
autosize := int32(0)
|
||||
var p1 *obj.Prog
|
||||
var p2 *obj.Prog
|
||||
for p := c.cursym.Func().Text; p != nil; p = p.Link {
|
||||
o := p.As
|
||||
switch o {
|
||||
case obj.ATEXT:
|
||||
autosize = int32(textstksiz)
|
||||
|
||||
if p.Mark&LEAF != 0 && autosize == 0 {
|
||||
// A leaf function with no locals has no frame.
|
||||
p.From.Sym.Set(obj.AttrNoFrame, true)
|
||||
}
|
||||
|
||||
if !p.From.Sym.NoFrame() {
|
||||
// If there is a stack frame at all, it includes
|
||||
// space to save the LR.
|
||||
autosize += int32(c.ctxt.Arch.FixedFrameSize)
|
||||
}
|
||||
|
||||
if autosize&4 != 0 {
|
||||
autosize += 4
|
||||
}
|
||||
|
||||
if autosize == 0 && c.cursym.Func().Text.Mark&LEAF == 0 {
|
||||
if c.cursym.Func().Text.From.Sym.NoSplit() {
|
||||
if ctxt.Debugvlog {
|
||||
ctxt.Logf("save suppressed in: %s\n", c.cursym.Name)
|
||||
}
|
||||
|
||||
c.cursym.Func().Text.Mark |= LEAF
|
||||
}
|
||||
}
|
||||
|
||||
p.To.Offset = int64(autosize) - ctxt.Arch.FixedFrameSize
|
||||
|
||||
if c.cursym.Func().Text.Mark&LEAF != 0 {
|
||||
c.cursym.Set(obj.AttrLeaf, true)
|
||||
if p.From.Sym.NoFrame() {
|
||||
break
|
||||
}
|
||||
}
|
||||
|
||||
if !p.From.Sym.NoSplit() {
|
||||
p = c.stacksplit(p, autosize) // emit split check
|
||||
}
|
||||
|
||||
q = p
|
||||
|
||||
if autosize != 0 {
|
||||
// Make sure to save link register for non-empty frame, even if
|
||||
// it is a leaf function, so that traceback works.
|
||||
// Store link register before decrement SP, so if a signal comes
|
||||
// during the execution of the function prologue, the traceback
|
||||
// code will not see a half-updated stack frame.
|
||||
// This sequence is not async preemptible, as if we open a frame
|
||||
// at the current SP, it will clobber the saved LR.
|
||||
q = c.ctxt.StartUnsafePoint(q, c.newprog)
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = mov
|
||||
q.Pos = p.Pos
|
||||
q.From.Type = obj.TYPE_REG
|
||||
q.From.Reg = REGLINK
|
||||
q.To.Type = obj.TYPE_MEM
|
||||
q.To.Offset = int64(-autosize)
|
||||
q.To.Reg = REGSP
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = add
|
||||
q.Pos = p.Pos
|
||||
q.From.Type = obj.TYPE_CONST
|
||||
q.From.Offset = int64(-autosize)
|
||||
q.To.Type = obj.TYPE_REG
|
||||
q.To.Reg = REGSP
|
||||
q.Spadj = +autosize
|
||||
|
||||
q = c.ctxt.EndUnsafePoint(q, c.newprog, -1)
|
||||
}
|
||||
|
||||
if c.cursym.Func().Text.From.Sym.Wrapper() && c.cursym.Func().Text.Mark&LEAF == 0 {
|
||||
// if(g->panic != nil && g->panic->argp == FP) g->panic->argp = bottom-of-frame
|
||||
//
|
||||
// MOV g_panic(g), R1
|
||||
// BEQ R1, end
|
||||
// MOV panic_argp(R1), R2
|
||||
// ADD $(autosize+FIXED_FRAME), R29, R3
|
||||
// BNE R2, R3, end
|
||||
// ADD $FIXED_FRAME, R29, R2
|
||||
// MOV R2, panic_argp(R1)
|
||||
// end:
|
||||
// NOP
|
||||
//
|
||||
// The NOP is needed to give the jumps somewhere to land.
|
||||
// It is a liblink NOP, not an hardware NOP: it encodes to 0 instruction bytes.
|
||||
//
|
||||
// We don't generate this for leafs because that means the wrapped
|
||||
// function was inlined into the wrapper.
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
|
||||
q.As = mov
|
||||
q.From.Type = obj.TYPE_MEM
|
||||
q.From.Reg = REGG
|
||||
q.From.Offset = 4 * int64(c.ctxt.Arch.PtrSize) // G.panic
|
||||
q.To.Type = obj.TYPE_REG
|
||||
q.To.Reg = REG_R19
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = ABEQ
|
||||
q.From.Type = obj.TYPE_REG
|
||||
q.From.Reg = REG_R19
|
||||
q.To.Type = obj.TYPE_BRANCH
|
||||
q.Mark |= BRANCH
|
||||
p1 = q
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = mov
|
||||
q.From.Type = obj.TYPE_MEM
|
||||
q.From.Reg = REG_R19
|
||||
q.From.Offset = 0 // Panic.argp
|
||||
q.To.Type = obj.TYPE_REG
|
||||
q.To.Reg = REG_R4
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = add
|
||||
q.From.Type = obj.TYPE_CONST
|
||||
q.From.Offset = int64(autosize) + ctxt.Arch.FixedFrameSize
|
||||
q.Reg = REGSP
|
||||
q.To.Type = obj.TYPE_REG
|
||||
q.To.Reg = REG_R5
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = ABNE
|
||||
q.From.Type = obj.TYPE_REG
|
||||
q.From.Reg = REG_R4
|
||||
q.Reg = REG_R5
|
||||
q.To.Type = obj.TYPE_BRANCH
|
||||
q.Mark |= BRANCH
|
||||
p2 = q
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = add
|
||||
q.From.Type = obj.TYPE_CONST
|
||||
q.From.Offset = ctxt.Arch.FixedFrameSize
|
||||
q.Reg = REGSP
|
||||
q.To.Type = obj.TYPE_REG
|
||||
q.To.Reg = REG_R4
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
q.As = mov
|
||||
q.From.Type = obj.TYPE_REG
|
||||
q.From.Reg = REG_R4
|
||||
q.To.Type = obj.TYPE_MEM
|
||||
q.To.Reg = REG_R19
|
||||
q.To.Offset = 0 // Panic.argp
|
||||
|
||||
q = obj.Appendp(q, newprog)
|
||||
|
||||
q.As = obj.ANOP
|
||||
p1.To.SetTarget(q)
|
||||
p2.To.SetTarget(q)
|
||||
}
|
||||
|
||||
case ARET:
|
||||
if p.From.Type == obj.TYPE_CONST {
|
||||
ctxt.Diag("using BECOME (%v) is not supported!", p)
|
||||
break
|
||||
}
|
||||
|
||||
retSym := p.To.Sym
|
||||
p.To.Name = obj.NAME_NONE // clear fields as we may modify p to other instruction
|
||||
p.To.Sym = nil
|
||||
|
||||
if c.cursym.Func().Text.Mark&LEAF != 0 {
|
||||
if autosize == 0 {
|
||||
p.As = AJMP
|
||||
p.From = obj.Addr{}
|
||||
if retSym != nil { // retjmp
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
p.To.Name = obj.NAME_EXTERN
|
||||
p.To.Sym = retSym
|
||||
} else {
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Reg = REGLINK
|
||||
p.To.Offset = 0
|
||||
}
|
||||
p.Mark |= BRANCH
|
||||
break
|
||||
}
|
||||
|
||||
p.As = add
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = int64(autosize)
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REGSP
|
||||
p.Spadj = -autosize
|
||||
|
||||
q = c.newprog()
|
||||
q.As = AJMP
|
||||
q.Pos = p.Pos
|
||||
if retSym != nil { // retjmp
|
||||
q.To.Type = obj.TYPE_BRANCH
|
||||
q.To.Name = obj.NAME_EXTERN
|
||||
q.To.Sym = retSym
|
||||
} else {
|
||||
q.To.Type = obj.TYPE_MEM
|
||||
q.To.Offset = 0
|
||||
q.To.Reg = REGLINK
|
||||
}
|
||||
q.Mark |= BRANCH
|
||||
q.Spadj = +autosize
|
||||
|
||||
q.Link = p.Link
|
||||
p.Link = q
|
||||
break
|
||||
}
|
||||
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Offset = 0
|
||||
p.From.Reg = REGSP
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REGLINK
|
||||
|
||||
if autosize != 0 {
|
||||
q = c.newprog()
|
||||
q.As = add
|
||||
q.Pos = p.Pos
|
||||
q.From.Type = obj.TYPE_CONST
|
||||
q.From.Offset = int64(autosize)
|
||||
q.To.Type = obj.TYPE_REG
|
||||
q.To.Reg = REGSP
|
||||
q.Spadj = -autosize
|
||||
|
||||
q.Link = p.Link
|
||||
p.Link = q
|
||||
}
|
||||
|
||||
q1 = c.newprog()
|
||||
q1.As = AJMP
|
||||
q1.Pos = p.Pos
|
||||
if retSym != nil { // retjmp
|
||||
q1.To.Type = obj.TYPE_BRANCH
|
||||
q1.To.Name = obj.NAME_EXTERN
|
||||
q1.To.Sym = retSym
|
||||
} else {
|
||||
q1.To.Type = obj.TYPE_MEM
|
||||
q1.To.Offset = 0
|
||||
q1.To.Reg = REGLINK
|
||||
}
|
||||
q1.Mark |= BRANCH
|
||||
q1.Spadj = +autosize
|
||||
|
||||
q1.Link = q.Link
|
||||
q.Link = q1
|
||||
|
||||
case AADD,
|
||||
AADDU,
|
||||
AADDV,
|
||||
AADDVU:
|
||||
if p.To.Type == obj.TYPE_REG && p.To.Reg == REGSP && p.From.Type == obj.TYPE_CONST {
|
||||
p.Spadj = int32(-p.From.Offset)
|
||||
}
|
||||
|
||||
case obj.AGETCALLERPC:
|
||||
if cursym.Leaf() {
|
||||
// MOV LR, Rd
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGLINK
|
||||
} else {
|
||||
// MOV (RSP), Rd
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Reg = REGSP
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
func (c *ctxt0) stacksplit(p *obj.Prog, framesize int32) *obj.Prog {
|
||||
var mov, add obj.As
|
||||
|
||||
add = AADDV
|
||||
mov = AMOVV
|
||||
if c.ctxt.Flag_maymorestack != "" {
|
||||
// Save LR and REGCTXT.
|
||||
frameSize := 2 * c.ctxt.Arch.PtrSize
|
||||
|
||||
p = c.ctxt.StartUnsafePoint(p, c.newprog)
|
||||
|
||||
// MOV REGLINK, -8/-16(SP)
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGLINK
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Offset = int64(-frameSize)
|
||||
p.To.Reg = REGSP
|
||||
|
||||
// MOV REGCTXT, -4/-8(SP)
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGCTXT
|
||||
p.To.Type = obj.TYPE_MEM
|
||||
p.To.Offset = -int64(c.ctxt.Arch.PtrSize)
|
||||
p.To.Reg = REGSP
|
||||
|
||||
// ADD $-8/$-16, SP
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = add
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = int64(-frameSize)
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REGSP
|
||||
p.Spadj = int32(frameSize)
|
||||
|
||||
// JAL maymorestack
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = AJAL
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
// See ../x86/obj6.go
|
||||
p.To.Sym = c.ctxt.LookupABI(c.ctxt.Flag_maymorestack, c.cursym.ABI())
|
||||
p.Mark |= BRANCH
|
||||
|
||||
// Restore LR and REGCTXT.
|
||||
|
||||
// MOV 0(SP), REGLINK
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Offset = 0
|
||||
p.From.Reg = REGSP
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REGLINK
|
||||
|
||||
// MOV 4/8(SP), REGCTXT
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Offset = int64(c.ctxt.Arch.PtrSize)
|
||||
p.From.Reg = REGSP
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REGCTXT
|
||||
|
||||
// ADD $8/$16, SP
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = add
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = int64(frameSize)
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REGSP
|
||||
p.Spadj = int32(-frameSize)
|
||||
|
||||
p = c.ctxt.EndUnsafePoint(p, c.newprog, -1)
|
||||
}
|
||||
|
||||
// Jump back to here after morestack returns.
|
||||
startPred := p
|
||||
|
||||
// MOV g_stackguard(g), R19
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_MEM
|
||||
p.From.Reg = REGG
|
||||
p.From.Offset = 2 * int64(c.ctxt.Arch.PtrSize) // G.stackguard0
|
||||
if c.cursym.CFunc() {
|
||||
p.From.Offset = 3 * int64(c.ctxt.Arch.PtrSize) // G.stackguard1
|
||||
}
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REG_R19
|
||||
|
||||
// Mark the stack bound check and morestack call async nonpreemptible.
|
||||
// If we get preempted here, when resumed the preemption request is
|
||||
// cleared, but we'll still call morestack, which will double the stack
|
||||
// unnecessarily. See issue #35470.
|
||||
p = c.ctxt.StartUnsafePoint(p, c.newprog)
|
||||
|
||||
var q *obj.Prog
|
||||
if framesize <= objabi.StackSmall {
|
||||
// small stack: SP < stackguard
|
||||
// AGTU SP, stackguard, R19
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = ASGTU
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGSP
|
||||
p.Reg = REG_R19
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REG_R19
|
||||
} else {
|
||||
// large stack: SP-framesize < stackguard-StackSmall
|
||||
offset := int64(framesize) - objabi.StackSmall
|
||||
if framesize > objabi.StackBig {
|
||||
// Such a large stack we need to protect against underflow.
|
||||
// The runtime guarantees SP > objabi.StackBig, but
|
||||
// framesize is large enough that SP-framesize may
|
||||
// underflow, causing a direct comparison with the
|
||||
// stack guard to incorrectly succeed. We explicitly
|
||||
// guard against underflow.
|
||||
//
|
||||
// SGTU $(framesize-StackSmall), SP, R4
|
||||
// BNE R4, label-of-call-to-morestack
|
||||
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = ASGTU
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = offset
|
||||
p.Reg = REGSP
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REG_R4
|
||||
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
q = p
|
||||
p.As = ABNE
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REG_R4
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
p.Mark |= BRANCH
|
||||
}
|
||||
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = add
|
||||
p.From.Type = obj.TYPE_CONST
|
||||
p.From.Offset = -offset
|
||||
p.Reg = REGSP
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REG_R4
|
||||
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
p.As = ASGTU
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REG_R4
|
||||
p.Reg = REG_R19
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REG_R19
|
||||
}
|
||||
|
||||
// q1: BNE R19, done
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
q1 := p
|
||||
|
||||
p.As = ABNE
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REG_R19
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
p.Mark |= BRANCH
|
||||
|
||||
// MOV LINK, R5
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = mov
|
||||
p.From.Type = obj.TYPE_REG
|
||||
p.From.Reg = REGLINK
|
||||
p.To.Type = obj.TYPE_REG
|
||||
p.To.Reg = REG_R5
|
||||
if q != nil {
|
||||
q.To.SetTarget(p)
|
||||
p.Mark |= LABEL
|
||||
}
|
||||
|
||||
p = c.ctxt.EmitEntryStackMap(c.cursym, p, c.newprog)
|
||||
|
||||
// JAL runtime.morestack(SB)
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = AJAL
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
if c.cursym.CFunc() {
|
||||
p.To.Sym = c.ctxt.Lookup("runtime.morestackc")
|
||||
} else if !c.cursym.Func().Text.From.Sym.NeedCtxt() {
|
||||
p.To.Sym = c.ctxt.Lookup("runtime.morestack_noctxt")
|
||||
} else {
|
||||
p.To.Sym = c.ctxt.Lookup("runtime.morestack")
|
||||
}
|
||||
p.Mark |= BRANCH
|
||||
|
||||
p = c.ctxt.EndUnsafePoint(p, c.newprog, -1)
|
||||
|
||||
// JMP start
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = AJMP
|
||||
p.To.Type = obj.TYPE_BRANCH
|
||||
p.To.SetTarget(startPred.Link)
|
||||
startPred.Link.Mark |= LABEL
|
||||
p.Mark |= BRANCH
|
||||
|
||||
// placeholder for q1's jump target
|
||||
p = obj.Appendp(p, c.newprog)
|
||||
|
||||
p.As = obj.ANOP // zero-width place holder
|
||||
q1.To.SetTarget(p)
|
||||
|
||||
return p
|
||||
}
|
||||
|
||||
func (c *ctxt0) addnop(p *obj.Prog) {
|
||||
q := c.newprog()
|
||||
q.As = ANOOP
|
||||
q.Pos = p.Pos
|
||||
q.Link = p.Link
|
||||
p.Link = q
|
||||
}
|
||||
|
||||
var Linkloong64 = obj.LinkArch{
|
||||
Arch: sys.ArchLoong64,
|
||||
Init: buildop,
|
||||
Preprocess: preprocess,
|
||||
Assemble: span0,
|
||||
Progedit: progedit,
|
||||
DWARFRegisters: LOONG64DWARFRegisters,
|
||||
}
|
||||
@ -507,15 +507,16 @@ var regSpace []regSet
|
||||
const (
|
||||
// Because of masking operations in the encodings, each register
|
||||
// space should start at 0 modulo some power of 2.
|
||||
RBase386 = 1 * 1024
|
||||
RBaseAMD64 = 2 * 1024
|
||||
RBaseARM = 3 * 1024
|
||||
RBasePPC64 = 4 * 1024 // range [4k, 8k)
|
||||
RBaseARM64 = 8 * 1024 // range [8k, 13k)
|
||||
RBaseMIPS = 13 * 1024 // range [13k, 14k)
|
||||
RBaseS390X = 14 * 1024 // range [14k, 15k)
|
||||
RBaseRISCV = 15 * 1024 // range [15k, 16k)
|
||||
RBaseWasm = 16 * 1024
|
||||
RBase386 = 1 * 1024
|
||||
RBaseAMD64 = 2 * 1024
|
||||
RBaseARM = 3 * 1024
|
||||
RBasePPC64 = 4 * 1024 // range [4k, 8k)
|
||||
RBaseARM64 = 8 * 1024 // range [8k, 13k)
|
||||
RBaseMIPS = 13 * 1024 // range [13k, 14k)
|
||||
RBaseS390X = 14 * 1024 // range [14k, 15k)
|
||||
RBaseRISCV = 15 * 1024 // range [15k, 16k)
|
||||
RBaseWasm = 16 * 1024
|
||||
RBaseLOONG64 = 17 * 1024
|
||||
)
|
||||
|
||||
// RegisterRegister binds a pretty-printer (Rconv) for register
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user